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<title>u-boot.git/arch/arm/mach-aspeed, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2026-07-07T00:26:12Z</updated>
<entry>
<title>Merge branch 'next'</title>
<updated>2026-07-07T00:26:12Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-07-07T00:26:12Z</published>
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<id>urn:sha1:ee5d46b45ec0c63f8f9dd1e816e0dac3452ccc3d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>arm: aspeed: add ASPEED AST2700 SoC family support</title>
<updated>2026-06-29T19:43:20Z</updated>
<author>
<name>Ryan Chen</name>
<email>ryan_chen@aspeedtech.com</email>
</author>
<published>2026-06-12T09:43:09Z</published>
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<id>urn:sha1:b62b55ba4b2d1cabd6bb0943685c3115f6ee8bd3</id>
<content type='text'>
Add initial support for the ASPEED AST2700, an arm64 (Cortex-A35)
Baseboard Management Controller (BMC) SoC. AST2700 is Aspeed's 8th
generation BMC and uses a dual-die architecture: SoC0 (the "CPU"
die) hosts the four Cortex-A35 cores and its own SCU at 0x12c02000,
while SoC1 (the "IO" die) hosts the peripherals and its own SCU at
0x14c02000.

This commit adds:
  - ASPEED_AST2700 Kconfig option and the ast2700 mach subdir
    (mach Makefile, ast2700/Kconfig, board/aspeed/evb_ast2700/*)
  - arm64 MMU map covering the SoC device window and the DRAM
    region at 0x4_0000_0000 (up to 8 GiB)
  - lowlevel_init.S for early CPU bring-up
  - cpu-info: print SoC ID (AST2700/2720/2750 A0/A1/A2 variants)
    and reset cause (cold reset, EXT reset, WDT reset)
  - board_common: dram_init via UCLASS_RAM, AHBC timeout init
  - platform: env_get_location() that selects SPI/eMMC based on
    the IO-die HW strap; arch_misc_init() that exposes
    ${boot_device} and ${verify} to the boot script
  - SCU0/SCU1 register layout header (scu_ast2700.h)
  - configs/evb-ast2700_defconfig and include/configs/evb_ast2700.h
    for the AST2700 EVB board

The defconfig depends on ast2700-evb.dts, which is introduced in
a subsequent patch; this commit must be applied with the
remaining series for evb-ast2700_defconfig to build.

Signed-off-by: Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;
</content>
</entry>
<entry>
<title>arm: aspeed: Fix AST2600 SPL external DTB alignment</title>
<updated>2026-06-23T16:41:25Z</updated>
<author>
<name>Quentin Strydom</name>
<email>qstrydom0@gmail.com</email>
</author>
<published>2026-06-20T15:07:24Z</published>
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<id>urn:sha1:fcda974e36033ad5331a9b4a4a551af4e141ad7d</id>
<content type='text'>
For AST2600 SPL with CONFIG_SPL_SEPARATE_BSS=y and
CONFIG_OF_SEPARATE=y, fdt_find_separate() expects the appended control
DTB at _image_binary_end.

The AST2600 SPL linker script aligned _image_binary_end via the
.binman_sym_table section. In builds where that section has no emitted
contents, objcopy -O binary does not include the alignment bytes in
spl/u-boot-spl-nodtb.bin. This causes the nodtb binary to end before
_image_binary_end, so the appended DTB is placed too early.

On evb-ast2600 this produced:

  sizeof(spl/u-boot-spl-nodtb.bin) = 0xc92c
  _image_binary_end                = 0xc930

SPL then looked four bytes past the FDT header and failed with:

  Missing DTB
  No serial driver found

Move the 8-byte alignment into the preceding emitted __u_boot_list
section so the objcopy output and _image_binary_end agree.

Signed-off-by: Quentin Strydom &lt;qstrydom0@gmail.com&gt;
</content>
</entry>
<entry>
<title>core: Rework REGMAP symbols implementation</title>
<updated>2026-03-30T22:59:35Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-03-17T01:24:19Z</published>
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<id>urn:sha1:0da1866a8fdd4d4bc4837ef2af281dbe010ae16b</id>
<content type='text'>
As exposed by "make randconfig", we have an issue with the dependencies
for REGMAP (and xPL variants). As this is a library function, it should
always be selected and not depended on by other functionality. This is
largely done correctly today, so just correct the few outliers.

Acked-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>treewide: Clean up DECLARE_GLOBAL_DATA_PTR usage</title>
<updated>2026-02-17T19:50:22Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2026-02-09T01:30:18Z</published>
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<id>urn:sha1:0f90b1e715f8abe41b0875752eb184f46032ff11</id>
<content type='text'>
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.

Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.

Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt; #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal &lt;anshuld@ti.com&gt; #TI boards
Acked-by: Yao Zi &lt;me@ziyao.cc&gt; #TH1520
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: Remove rel.dyn from SPL linker scripts</title>
<updated>2026-01-28T18:57:01Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-01-27T21:31:49Z</published>
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<id>urn:sha1:5ffc1dcc26d3df9e2b192151936cb98014fb6e49</id>
<content type='text'>
As of v2026.01, no platforms contain any rel.dyn sections in their xPL
phase images. Their inclusion in linker scripts initially was an
oversight as part of taking the full U-Boot linker scripts and modifying
them down. Then in commit 8b0ebe054bb3 ("arm: Update linker scripts to
ensure appended device tree is aligned") these sections were used to
force correct alignment for the device tree. This however, lead to a
different problem.

That problem is that when we do not have a separate BSS section in SPL
we instead would overlay the BSS with the rel.dyn section, in the common
linker script case. This in turn lead to creating an incorrectly sized
BSS "pad" file sometimes (depending on arbitrary changes within the rest
of the binary itself). This in turn lead to the dtb being in the wrong
location in the binary and not found at run time.

This commit fixes a few things:
- Remove the rel.dyn section from all ARM SPL linker scripts.
- In turn, this moves the dtb alignment statement in to another section.
- For ast2600 which uses CONFIG_POSITION_INDEPENDENT we need to keep the
  symbols however.

Tested-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Reported-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Co-developed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Reviewed-by: Chia-Wei, Wang &lt;chiawei_wang@aspeedtech.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: Update linker scripts to ensure appended device tree is aligned</title>
<updated>2026-01-20T18:06:41Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-01-15T22:19:32Z</published>
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<id>urn:sha1:8b0ebe054bb3334c6ca9bed018360b08d4ddc7a4</id>
<content type='text'>
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Expands some linker sections to be more readable when adding a second
  statement to the section.
- Aligns the final section before _end (for U-Boot) or
  _image_binary_end or __bss_end (for xPL phases) by 8-bytes by adding
  '. = ALIGN(8);' to the final section before the symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).
- Remove now-spurious  '. = ALIGN(x);' statements that were intended to
  provide the above alignments.

Tested-by: Michal Simek &lt;michal.simek@amd.com&gt; # Zynq
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
[trini: Also update arch/arm/cpu/armv8/u-boot.lds as Ilas requested]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>aspeed: Fix Kconfig logic on "DM_RESET" and ASPEED_AST2500</title>
<updated>2024-12-04T20:00:30Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-11-15T16:53:57Z</published>
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<id>urn:sha1:26a2b69b2440d261a3fd814d37d023e704e92853</id>
<content type='text'>
It is not the case that we can only pick ASPEED_AST2500 if DM_RESET
is enabled, but rather choosing ASPEED_AST2500 means we must select
DM_RESET.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ast2600: spl: Use readl for reading mmio</title>
<updated>2024-11-25T19:12:19Z</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2024-11-18T02:12:56Z</published>
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<id>urn:sha1:7327218681d98e8f66624667c6e3b0554502ce6c</id>
<content type='text'>
u-boot was crashing in qemu as the modeled hardware enforced overly
strict memory reads.

While this code will work on existing hardware, fix to avoid future issues.

Fixes: 12770d0df0e8 ("ast2600: spl: Add boot mode detection")
Link: https://gitlab.com/qemu-project/qemu/-/issues/2636
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:46Z</published>
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<id>urn:sha1:bef9fdbed2e525ce9264d2ae2fbcb37db7472052</id>
<content type='text'>
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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