u-boot.git/arch/arm/mach-k3, branch master

mach-k3: enable mmu after reserved memory is unmapped

2026-05-25T15:29:50Z

Currently the sequence to enable caches for the A53/A72 core on K3 devices looks as follows: 1. Map entire DDR banks 2. Setup page tables (done by mmu_setup) 3. Enable MMU 4. Unmap reserved-memory regions 5. Enable caches However there is a brief period of execution between #3 and #4 where the core can issue speculative accesses to the entire DDR space (including the reserved-memory regions) despite the caches being disabled. A firewall exception is triggered whenever such speculative access is made to secure DDR region of TFA or OP-TEE. This patch fixes the issue by re-ordering the sequence as follows: 1. Map entire DDR banks 2. Setup page tables 3. Unmap reserved-memory regions 4. Enable MMU 5. Enable caches Fixes: f1c694b8fdde ("mach-k3: map all banks using mem_map_from_dram_banks") Reported-by: Suhaas Joshi Signed-off-by: Anshul Dalal Reviewed-by: Ilias Apalodimas

arm: armv8: mmu: move mmu enablement out of mmu_setup

2026-05-25T15:29:50Z

Currently mmu_setup for ARMv8 performs two functions, first it sets up the page tables based the memory map provided by the board and then it enables the MMU. However for some platforms runtime fixes to the generated page tables are required before the MMU can be enabled, such as K3 family of SoCs. Therefore this patch moves the enablement of the MMU out of mmu_setup and to a standalone mmu_enable function to give more granular control to the platforms. Note that no functional changes are intended from this patch. Reviewed-by: Ilias Apalodimas Signed-off-by: Anshul Dalal

Merge patch series "j721s2: j784s4: Add workaround for errata i2437"

2026-05-11T18:33:52Z

Udit Kumar says: Add a necessary hardware errata workaround for J721S2 and J784S4. Bootlogs https://gist.github.com/uditkumarti/da2a489a78d3241ecd2791c9df1c1317 Link: https://lore.kernel.org/r/20260415152152.3048491-1-u-kumar1@ti.com

arch: mach-k3: j784s4_init: Add workaround for errata i2437

2026-05-11T18:32:00Z

Add the workaround proposed for J784S4 errata i2437 (link) for SE clock-gating turning off too early. Without this, a hardware bug present in C7120 leads to C7120 CPU hanging. Link: https://www.ti.com/lit/pdf/sprz536 Signed-off-by: Neha Malcom Francis Signed-off-by: Udit Kumar

arch: mach-k3: j721s2_init: Add workaround for errata i2437

2026-05-11T18:32:00Z

Add the workaround proposed for J721S2 errata i2437 (link) for SE clock-gating turning off too early. Without this, a hardware bug present in C7120 leads to C7120 CPU hanging. Link: https://www.ti.com/lit/pdf/sprz530 Signed-off-by: Neha Malcom Francis Signed-off-by: Udit Kumar

arm: mach-k3: arm: mach-k3: Add writel_verify macro for register write verification

2026-05-11T18:32:00Z

Add a helper macro to write and verify a 32-bit value to a memory-mapped register. This is essential for hardware errata workarounds that require confirmation that register writes have taken effect before proceeding with initialization. Signed-off-by: Udit Kumar

arm: dts: k3-am69-aquila: migrate to OF_UPSTREAM

2026-04-27T17:18:27Z

Enable CONFIG_OF_UPSTREAM to receive automatic device tree updates for the Aquila AM69. Remove the now-obsolete device tree files: - arch/arm/dts/k3-am69-aquila-dev.dts - arch/arm/dts/k3-am69-aquila.dtsi Signed-off-by: Ernest Van Hoecke Acked-by: Francesco Dolcini

mach-k3: move k3_falcon_fdt_fixup out of r5/common.c

2026-03-25T20:37:12Z

k3_falcon_fdt_fixup is used to perform fdt fixups at runtime in falcon mode such as adding bootargs. Currently the function is only accessible to the R5 SPL but could be useful for A53 SPL based falcon mode setups as well. Therefore this patch moves the function from r5/common.c to common.c. Signed-off-by: Anshul Dalal

arm: mach-k3: use Kconfig options for ATF/OPTEE size

2026-03-25T20:37:09Z

The reserved memory sizes for ATF and OPTEE were hard-coded for K3 devices, this patch replaces them with a Kconfig option allowing for easier modifications. Acked-by: Andrew Davis Reviewed-by: Dhruva Gole Reviewed-by: Manorit Chawdhry Signed-off-by: Anshul Dalal Reviewed-by: Bryan Brattlof

Merge patch series "Add PCIe Boot support for TI J784S4 SoC"

2026-03-16T14:24:18Z

Siddharth Vadapalli says: This series adds PCIe endpoint boot support for the TI J784S4 SoC. Series is based on commit f9ffeec4bdc ("board: toradex: Make A53 get RAM size from DT in K3 boards") of the master branch of U-Boot. PCIe Boot Logs (J784S4-EVM running Linux as Root-Complex transfers bootloaders to another J784S4-EVM configured for PCIe Boot): https://gist.github.com/Siddharth-Vadapalli-at-TI/2d157003818441fe79a139d0dec1058a Link: https://lore.kernel.org/r/20260216102858.2745657-1-s-vadapalli@ti.com