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<title>u-boot.git/arch/arm/mach-rockchip, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/mach-rockchip?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/mach-rockchip?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2026-06-08T13:34:59Z</updated>
<entry>
<title>rockchip: Switch rk3229 boards to upstream devicetree</title>
<updated>2026-06-08T13:34:59Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-05-07T18:38:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=924f87b995fa6b451656df17f3b6be20a3cf9c4e'/>
<id>urn:sha1:924f87b995fa6b451656df17f3b6be20a3cf9c4e</id>
<content type='text'>
Switch rk3229 boards to upstream devicetree.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: Switch rk3128 boards to upstream devicetree</title>
<updated>2026-06-08T13:34:59Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-05-07T18:37:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3336e85b6a303663723436ca15dc5ea5ed5358e0'/>
<id>urn:sha1:3336e85b6a303663723436ca15dc5ea5ed5358e0</id>
<content type='text'>
Switch rk3128 boards to upstream devicetree.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: spl: Add support for booting from UFS</title>
<updated>2026-06-08T13:32:40Z</updated>
<author>
<name>Alexey Charkov</name>
<email>alchark@flipper.net</email>
</author>
<published>2026-03-11T13:30:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9941ec2c5cf73a890bbb896516b383eec9c00657'/>
<id>urn:sha1:9941ec2c5cf73a890bbb896516b383eec9c00657</id>
<content type='text'>
Add the required architecture-specific lookups to enable U-boot SPL to
load images from UFS storage devices on Rockchip RK3576, which has a
boot ROM capable of loading the SPL image from UFS.

Reviewed-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Alexey Charkov &lt;alchark@flipper.net&gt;
</content>
</entry>
<entry>
<title>board: rockchip: Add FriendlyElec NanoPi R76S</title>
<updated>2026-06-08T13:22:19Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2026-03-10T00:06:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=82a5b5f7ca494e643f9bf1454c620dd2b271fdbc'/>
<id>urn:sha1:82a5b5f7ca494e643f9bf1454c620dd2b271fdbc</id>
<content type='text'>
The NanoPi R76S (as "R76S") is an open-sourced mini IoT gateway
device with two 2.5G, designed and developed by FriendlyElec.

Features tested on a NanoPi R76S 2411:
- SD-card boot
- eMMC boot
- LEDs and button
- PCIe/Ethernet
- USB host

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>arm: Remove redundant "xPL_SYS_MALLOC_F default y" entries</title>
<updated>2026-04-07T21:26:43Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-03-25T19:00:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=83df1103ef3787e7682bf8fe94c06281cb174bfc'/>
<id>urn:sha1:83df1103ef3787e7682bf8fe94c06281cb174bfc</id>
<content type='text'>
The symbol SPL_SYS_MALLOC_F defaults to y when visible and
TPL_SYS_MALLOC_F defaults to y when visible and SPL_SYS_MALLOC_F is
enabled. Remove the places from Kconfig files that had unneccsary
"default y" for these options.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>global: Audit Kconfig usage of PARTITION_TYPE_GUID</title>
<updated>2026-04-03T18:06:10Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-03-20T20:53:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b0eaaa067ea40611b9c047576adc8abd1a4d63a7'/>
<id>urn:sha1:b0eaaa067ea40611b9c047576adc8abd1a4d63a7</id>
<content type='text'>
It is not functionally possible to use the code enabled by
PARTITION_TYPE_GUID without having EFI_PARTITION be enabled as well. Not
all users of the former had ensured that the latter was enabled however,
so audit all current users and then as appropriate select or imply
EFI_PARTITION as needed.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3568: Include all addressable DRAM in memory map</title>
<updated>2026-03-13T22:17:15Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2026-03-09T21:02:32Z</published>
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<id>urn:sha1:fab3b667b4128fae2d94752bb03088f84dafcf89</id>
<content type='text'>
Rockchip RK356x supports up to 8 GiB DRAM, however U-Boot only includes
the initial 32-bit 0-4 GiB addressable range in its memory map,
something that matches gd-&gt;ram_top and current expected memory available
for use in U-Boot.

The vendor DRAM init blobs add following ddr_mem rk atags [1]:

  4 GiB: [0x0, 0xf0000000) and [0x1f0000000, 0x200000000)
  8 GiB: [0x0, 0x200000000)

Add the remaining 64-bit 4-8 GiB addressable range, that already is
reported to OS, to the U-Boot memory map to more correctly describe all
available and addressable DRAM of RK356x. While at it also add the
missing UL suffix to the PCIe address range for consistency.

[1] https://gist.github.com/Kwiboo/6d983693c79365b43c330eb3191cbace

Acked-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>arm: rockchip: don't use non-existent CONFIG_TPL_TINY_FRAMEWORK</title>
<updated>2026-03-10T16:07:03Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2026-02-25T07:28:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cff18cef190684736ff11feff0da6dbd7324ed9d'/>
<id>urn:sha1:cff18cef190684736ff11feff0da6dbd7324ed9d</id>
<content type='text'>
Symbol CONFIG_TPL_TINY_FRAMEWORK does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: Reduce size of ramboot usb472 payload</title>
<updated>2026-03-10T16:07:03Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2026-02-04T21:29:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9d3d4d61925234c8e98fd38e2592696ec360093c'/>
<id>urn:sha1:9d3d4d61925234c8e98fd38e2592696ec360093c</id>
<content type='text'>
Booting into SPL using ramboot can take several seconds on some SoCs due
to the large size of the usb472 payload sent over USB to BootROM.

A large chunk of the usb472 payload, around 1-2 MiB, is padding used to
avoid overlapping when loading e.g. TF-A to 0x40000.

BootROM is likely wasting unnecessary time crc16 validating the padding
of the payload.

Place the FIT payload directly after SPL and memmove it to the expected
memory location, SPL_LOAD_FIT_ADDRESS, to avoid excessive padding and
help speed up ramboot.

Binman symbols are used to get the position and size of the FIT payload
that is initially loaded into DRAM by the BootROM.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3588: include all addressable DRAM in memory map</title>
<updated>2026-03-10T16:07:03Z</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@cherry.de</email>
</author>
<published>2026-02-03T09:58:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b107cfbb794e3c6dc32fc8de176220960207fe68'/>
<id>urn:sha1:b107cfbb794e3c6dc32fc8de176220960207fe68</id>
<content type='text'>
The ATAGS set by Rockchip DDR init blob[1] specify DRAM banks above the
first addressable 4GiB which we haven't done in the mem_map for RK3588
yet.

For 4GiB DRAM, the 256MiB missing from the first addressable 4GiB (due
to MMIO) are accessible at the end of the 8GiB address space. For 8GiB,
4-8GiB address space is used for the additional 4GiB and the missing
256MiB are at the end of 12GiB address space. For 12, 4-12GiB and the
missing 256MiB at the end of 20GiB address space. For 16GiB, 4-~16GiB
with two holes (reasons unknown) around 16GiB and the missing 256MiB is
at the end of 20GiB address space. For 32GiB, 4-16~GiB with two holes
and then 16GiB to 32GiB address space (so likely missing 256MiB from
MMIO address space).

[1] https://gist.github.com/Kwiboo/1c020d37e3adbc9d0d79dc003d921977

Suggested-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
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