u-boot.git/arch/arm/mach-versal-net/include, branch master Unnamed repository; edit this file 'description' to name the repository. arm64: versal: Add SelectMAP boot mode identification 2023-10-09T11:03:23+00:00 Polak, Leszek LPolak@arri.de 2023-10-08T14:34:42+00:00 facfa5659b4dfbfffa91283a1234297a744bf28a The SelectMAP configuration interface provides an 8-bit, 16-bit or 32-bit bidirectional data bus interface to the Versal FPGA configuration logic that can be used for both configuration and readback. A connected microcontoller to the SelectMAP interface can load boot image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot. This commit adds the missing identification of the SelectMAP mode. Signed-off-by: Polak, Leszek <LPolak@arri.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Michal Simek <michal.simek@amd.com> Cc: Stefan Roese <sr@denx.de> Link: https://lore.kernel.org/r/DU0PR07MB8419F7765892CDBCE7D559C5C8CFA@DU0PR07MB8419.eurprd07.prod.outlook.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
The SelectMAP configuration interface provides an 8-bit,
16-bit or 32-bit bidirectional data bus interface to the Versal FPGA
configuration logic that can be used for both configuration and readback.

A connected microcontoller to the SelectMAP interface can load boot
image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot.

This commit adds the missing identification of the SelectMAP mode.

Signed-off-by: Polak, Leszek <LPolak@arri.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/DU0PR07MB8419F7765892CDBCE7D559C5C8CFA@DU0PR07MB8419.eurprd07.prod.outlook.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
xilinx: Consolidate zynqmp_mmio_read/write in zynqmp_firmware.h 2023-07-21T07:00:38+00:00 Michal Simek michal.simek@amd.com 2023-06-23T12:51:57+00:00 5b90412cbfcbf7b1df9ed34e0dab255838f43ea5 zynqmp_mmio_read/write() are firmware provided hooks that's why use only zynqmp_firmware.h for function declaration. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e7489556f9e447c737a578c169d7e1e43586a273.1687524706.git.michal.simek@amd.com 
zynqmp_mmio_read/write() are firmware provided hooks that's why use only
zynqmp_firmware.h for function declaration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e7489556f9e447c737a578c169d7e1e43586a273.1687524706.git.michal.simek@amd.com
cadence_qspi: Enable flash reset for Versal NET platform 2023-07-21T07:00:38+00:00 Ashok Reddy Soma ashok.reddy.soma@amd.com 2023-06-14T12:04:52+00:00 34dec6a443df2adb5df2c65b2c441652c5976b44 Enable flash reset functionality for Versal NET platform. In cadence_qspi.c there is weak function defined for reset, hence remove the check for config, so that it will work for Versal and Versal NET platforms. Add register defines in Versal NET hardware.h for mini U-Boot flash reset. Add read_delay initialization for Versal NET also. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614120452.21019-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
Enable flash reset functionality for Versal NET platform.
In cadence_qspi.c there is weak function defined for reset, hence remove
the check for config, so that it will work for Versal and Versal NET
platforms.

Add register defines in Versal NET hardware.h for mini U-Boot flash
reset.

Add read_delay initialization for Versal NET also.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614120452.21019-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
arm64: versal-net: Add support for SPP production version 2023-06-12T11:24:31+00:00 Michal Simek michal.simek@amd.com 2023-05-17T08:21:32+00:00 3e95bf9b76abde1f74b2998cd612cac22b9a1c20 Production version restarting platform version field from 0 that's why add new calculation to be able to use different DT for these platforms. Requested DT names for production silicons for IPP/SPP and EMU platform are versal-net-ipp-rev2.0.dts and versal-net-emu-rev2.0.dts. If platform version increase numbers revision can be even higher. As of today platform version is 2 that's why expected is rev2.2. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/691e166b3cf2643d7edf482bda5500163eecb35a.1684311689.git.michal.simek@amd.com 
Production version restarting platform version field from 0 that's why add
new calculation to be able to use different DT for these platforms.
Requested DT names for production silicons for IPP/SPP and EMU platform are
versal-net-ipp-rev2.0.dts and versal-net-emu-rev2.0.dts.
If platform version increase numbers revision can be even higher.
As of today platform version is 2 that's why expected is rev2.2.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/691e166b3cf2643d7edf482bda5500163eecb35a.1684311689.git.michal.simek@amd.com
arm64: versal-net: Detect and display bootmode 2023-06-12T11:24:31+00:00 Ashok Reddy Soma ashok.reddy.soma@amd.com 2023-05-16T14:47:53+00:00 ded539ff6633f3ba493e18bf23ce489bfc03f28d Read boodmode register using versal_net_get_bootmode() in board_late_init and prepare corresponding distro boot command sequence based on it. versal_net_get_bootmode() will be changed to use smc calls later, but for now directly reads the register. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230516144753.30869-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
Read boodmode register using versal_net_get_bootmode() in board_late_init
and prepare corresponding distro boot command sequence based on it.

versal_net_get_bootmode() will be changed to use smc calls later, but
for now directly reads the register.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230516144753.30869-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
xilinx: zynqmp: Add missing prototype for zynqmp_mmio_write 2023-03-09T12:15:00+00:00 Algapally Santosh Sagar santoshsagar.algapally@amd.com 2023-03-01T10:33:33+00:00 cc24fd78593896ba038c71eb356b32fdaa1cd690 Add missing prototype to fix the sparse warning, warning: no previous prototype for 'zynqmp_mmio_write' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230301103334.1455-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
Add missing prototype to fix the sparse warning, warning: no
previous prototype for 'zynqmp_mmio_write' [-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230301103334.1455-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
xilinx: versal-net: Add support for timer and start it 2023-01-16T14:34:37+00:00 Ashok Reddy Soma ashok.reddy.soma@amd.com 2023-01-10T07:44:07+00:00 724379d9afc850de2767094987a761f096af7718 Add support for starting timer by setting up time stamp generator registers. This is done only for EL3 i.e. mini U-Boot case. For other cases, it will be done TF-A. Add COUNTER_FREQUENCY and IOU_SWITCH_DIVISOR0 to Kconfig so that they can be tuned as required. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fcd8b0dc4b45a11f5e753afff42f84738ac813da.1673336645.git.michal.simek@amd.com 
Add support for starting timer by setting up time stamp generator
registers. This is done only for EL3 i.e. mini U-Boot case.
For other cases, it will be done TF-A.

Add COUNTER_FREQUENCY and IOU_SWITCH_DIVISOR0 to Kconfig so that they
can be tuned as required.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fcd8b0dc4b45a11f5e753afff42f84738ac813da.1673336645.git.michal.simek@amd.com
spi: cadence_qspi: Add support for Versal NET platform 2022-09-26T12:23:29+00:00 Michal Simek michal.simek@amd.com 2022-09-19T12:21:03+00:00 1e681448a38dcaf95a58592410382c3324c2cc00 Trivial changes to support cadence ospi driver for Versal NET platform. Also avoid ospi flash reset for now. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0789141f432189aab69bc496fe33e0218d1d7510.1663589964.git.michal.simek@amd.com 
Trivial changes to support cadence ospi driver for Versal NET platform.
Also avoid ospi flash reset for now.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0789141f432189aab69bc496fe33e0218d1d7510.1663589964.git.michal.simek@amd.com
arm64: versal-net: Add support for Versal NET platform 2022-09-26T12:23:29+00:00 Michal Simek michal.simek@amd.com 2022-09-19T12:21:02+00:00 f6aebdf676ed003391d158edde4ec74b41a83cb8 Versal NET platform is based on Versal chip which is reusing a lot of IPs. For more information about new IPs please take a look at DT which describe currently supported devices. The patch is adding architecture and board support with soc detection algorithm. Generic setting should be very similar to Versal but it will likely diverge in longer run. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com 
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com