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<title>u-boot.git/arch/arm, branch v2015.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm?h=v2015.04</id>
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<updated>2015-04-13T14:52:51Z</updated>
<entry>
<title>break build if it would produce broken binary</title>
<updated>2015-04-13T14:52:51Z</updated>
<author>
<name>Pavel Machek</name>
<email>pavel@denx.de</email>
</author>
<published>2015-04-13T12:49:28Z</published>
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<id>urn:sha1:a6a4c542d316b3401f0840ac5378743191bca851</id>
<content type='text'>
Add an error in known-bad case so that we don't produce broken and
hard to debug binaries.

Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://www.denx.de/git/u-boot-imx</title>
<updated>2015-04-13T14:52:46Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2015-04-13T14:52:46Z</published>
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<id>urn:sha1:1d2f74690cace803844bce198a6d5fa1b6cd11f9</id>
<content type='text'>
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</entry>
<entry>
<title>ARM: rpi: add a couple more revision IDs</title>
<updated>2015-04-13T12:48:36Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@wwwdotorg.org</email>
</author>
<published>2015-04-13T03:43:25Z</published>
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<id>urn:sha1:787affb41b6f0cca797a36383705f30ce9ca5c25</id>
<content type='text'>
According to Gordon Henderson's WiringPi library, there are some more
Pi revision IDs out there. Add support for them.

http://git.drogon.net/?p=wiringPi;a=blob_plain;f=wiringPi/wiringPi.c;hb=5edd177112c99416f68ba3e8c6c4db6ed942e796

At least ID 0x13 is out in the wild:

Reported-by: Chee-Yang Chau &lt;cychau@gmail.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
</content>
</entry>
<entry>
<title>ARM: fix arch/arm/Makefile for Tegra</title>
<updated>2015-04-11T16:04:30Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-04-11T15:58:14Z</published>
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<id>urn:sha1:bf71a29c8e611a5c7f18d0572edeae82189dd3a2</id>
<content type='text'>
Since commit 79d75d752717 (ARM: move -march=* and -mtune= options to
arch/arm/Makefile), all the Tegra boards are broken because the SPL
is built for ARMv7.

Insert Tegra-specific code to arch/arm/Makefile to set compiler
flags for an earlier ARM architecture.

Note:
The v1 patch for commit 79d75d752717 *was* correct when it was
submitted.  Notice it was originally written for multi .config
configuration where Kconfig set CONFIG_CPU_V7/CONFIG_CPU_ARM720T for
Tegra U-Boot Main/SPL, respectively.  But, until it was merged into
the mainline, commit e02ee2548afe (kconfig: switch to single .config
configuration) had been already applied there.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reported-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reported-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
Tested-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
</content>
</entry>
<entry>
<title>arm: armada-xp: Fix SPL for AXP by using save_boot_params_ret</title>
<updated>2015-04-11T09:49:00Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2015-03-11T11:05:04Z</published>
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<id>urn:sha1:4adb46a3144248b2d8b8a68684bee648815c4ada</id>
<content type='text'>
Patch e11c6c27 (arm: Allow lr to be saved by board code) introduced
a different method to return from save_boot_params(). The SPL support
for AXP has been pulled and changing to this new method is now
required for SPL to work correctly.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Luka Perkov &lt;luka.perkov@sartura.hr&gt;
</content>
</entry>
<entry>
<title>lpc32xx: add support for board work_92105</title>
<updated>2015-04-10T12:23:39Z</updated>
<author>
<name>Albert ARIBAUD \(3ADEV\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-03-31T09:40:51Z</published>
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<id>urn:sha1:412ae53aadb53cd63e754d638bafe6e426aeafee</id>
<content type='text'>
Work_92105 from Work Microwave is an LPC3250-
based board with the following features:
- 64MB or 128MB SDR DRAM
- 1 GB SLC NAND, managed through MLC controller.
- Ethernet
- Ethernet + PHY SMSC8710
- I2C:
  - EEPROM (24M01-compatible)
  - RTC (DS1374-compatible)
  - Temperature sensor (DS620)
  - DACs (2 x MAX518)
- SPI (through SSP interface)
  - Port expander MAX6957
- LCD display (HD44780-compatible), controlled
  through the port expander and DACs

This board has SPL support, and uses the LPC32XX boot
image format.

Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
</entry>
<entry>
<title>lpc32xx: add LPC32xx SSP support (SPI mode)</title>
<updated>2015-04-10T12:23:20Z</updated>
<author>
<name>Albert ARIBAUD \(3ADEV\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-03-31T09:40:47Z</published>
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<id>urn:sha1:981219eebe3cc29f155a37951788c18786260514</id>
<content type='text'>
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
</entry>
<entry>
<title>lpc32xx: add GPIO support</title>
<updated>2015-04-10T12:23:09Z</updated>
<author>
<name>Albert ARIBAUD \(3ADEV\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-03-31T09:40:46Z</published>
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<id>urn:sha1:606f7047603422746d112e41937649d44f311af4</id>
<content type='text'>
This driver only supports Driver Model, not legacy model.

Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
</entry>
<entry>
<title>lpc32xx: i2c: add LPC32xx I2C interface support</title>
<updated>2015-04-10T12:23:07Z</updated>
<author>
<name>Albert ARIBAUD \(3ADEV\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-03-31T09:40:45Z</published>
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<id>urn:sha1:5e862b95399e6e5ea7748ee29a38756685d622fd</id>
<content type='text'>
Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
</entry>
<entry>
<title>lpc32xx: mtd: nand: add MLC NAND controller</title>
<updated>2015-04-10T12:22:56Z</updated>
<author>
<name>Albert ARIBAUD \(3ADEV\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-03-31T09:40:44Z</published>
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<id>urn:sha1:c8381bf435ddb104594df00411a8ebd049dd753c</id>
<content type='text'>
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.

The SPL framework is supported.

Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
</entry>
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