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<title>u-boot.git/arch/arm, branch v2016.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>rockchip: rk3288: correct sdram setting</title>
<updated>2016-03-10T15:32:01+00:00</updated>
<author>
<name>Chris Zhong</name>
<email>zyw@rock-chips.com</email>
</author>
<published>2016-03-07T06:51:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b5788dc0dd9570e98552833767f4373db965985d'/>
<id>b5788dc0dd9570e98552833767f4373db965985d</id>
<content type='text'>
The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2,
and it expects uboot to store the value using a same protocol. But now
the ddr setting value is different with DMC, so if you enable the DMC,
system would crash in kernel. Correct the sdram setting here, according
to the requirements of kernel.

[0]
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/
chromeos-3.14/drivers/clk/rockchip/clk-rk3288-dmc.c

Signed-off-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2,
and it expects uboot to store the value using a same protocol. But now
the ddr setting value is different with DMC, so if you enable the DMC,
system would crash in kernel. Correct the sdram setting here, according
to the requirements of kernel.

[0]
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/
chromeos-3.14/drivers/clk/rockchip/clk-rk3288-dmc.c

Signed-off-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: make configure_emmc() empty for Firefly-RK3288</title>
<updated>2016-03-10T15:32:01+00:00</updated>
<author>
<name>FUKAUMI Naoki</name>
<email>naobsd@gmail.com</email>
</author>
<published>2016-03-05T13:32:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=87cef34576f5d0e7f094d99521e57537fef256de'/>
<id>87cef34576f5d0e7f094d99521e57537fef256de</id>
<content type='text'>
on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for
Firefly-RK3288. (it's fine for Rock2)

$ gcc --version
gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

$ ./tools/mkimage -n rk3288 -T rksd -d spl/u-boot-spl-dtb.bin u-boot-spl-dtb.img
Warning: SPL image is too large (size 0x80d0) and will not boot

to reduce size of SPL image, this patch makes configure_emmc() empty for
Firefly-RK3288 as same as Rock2.

Signed-off-by: FUKAUMI Naoki &lt;naobsd@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-By: Vagrant Cascadian &lt;vagrant@debian.org&gt;
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<pre>
on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for
Firefly-RK3288. (it's fine for Rock2)

$ gcc --version
gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

$ ./tools/mkimage -n rk3288 -T rksd -d spl/u-boot-spl-dtb.bin u-boot-spl-dtb.img
Warning: SPL image is too large (size 0x80d0) and will not boot

to reduce size of SPL image, this patch makes configure_emmc() empty for
Firefly-RK3288 as same as Rock2.

Signed-off-by: FUKAUMI Naoki &lt;naobsd@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-By: Vagrant Cascadian &lt;vagrant@debian.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3036: change ddr frequency to 400M</title>
<updated>2016-03-10T15:32:01+00:00</updated>
<author>
<name>Lin Huang</name>
<email>hl@rock-chips.com</email>
</author>
<published>2016-02-17T07:55:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=99aaa930754cd9558e42d526029267a2c023016e'/>
<id>99aaa930754cd9558e42d526029267a2c023016e</id>
<content type='text'>
emac may use dpll as clock parent, and it request the clock frequency
multiples of 50, so change ddr frequency to 400M.

Signed-off-by: Lin Huang &lt;hl@rock-chips.com&gt;
Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
emac may use dpll as clock parent, and it request the clock frequency
multiples of 50, so change ddr frequency to 400M.

Signed-off-by: Lin Huang &lt;hl@rock-chips.com&gt;
Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>omap3: Use raw SPL by default for mmc1</title>
<updated>2016-03-08T20:01:46+00:00</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-03-01T08:56:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=22d90d560a2b01c47f180e196e6c6485eb8e65db'/>
<id>22d90d560a2b01c47f180e196e6c6485eb8e65db</id>
<content type='text'>
Now that we fall back to the FS code path when we don't find u-boot
at the raw sector offset, there is no good reason to not default to
raw boot.

With this patch, I can successfully boot u-boot from a raw sector
offset on beagle-xm.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
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<pre>
Now that we fall back to the FS code path when we don't find u-boot
at the raw sector offset, there is no good reason to not default to
raw boot.

With this patch, I can successfully boot u-boot from a raw sector
offset on beagle-xm.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: uniphier: allow debug_ll_init() to do nothing for unknown SoCs</title>
<updated>2016-03-08T16:11:15+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-03-07T11:29:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5d07648662edf2b994a6433465d472a9a3e89923'/>
<id>5d07648662edf2b994a6433465d472a9a3e89923</id>
<content type='text'>
This function should just return for unknown SoCs rather than writing
unexpected values to registers.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
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<pre>
This function should just return for unknown SoCs rather than writing
unexpected values to registers.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: uniphier: fix build error when CONFIG_CMD_DDRMPHY_DUMP=y</title>
<updated>2016-03-08T16:10:47+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-03-04T06:54:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51244a60805fb91112f61ef268f58fc6d47a3d0a'/>
<id>51244a60805fb91112f61ef268f58fc6d47a3d0a</id>
<content type='text'>
The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit
46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data").

Fixes: 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data")
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
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<pre>
The build fails if compiled with CONFIG_CMD_DDRMPHY_DUMP=y since commit
46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data").

Fixes: 46abfcc99e04 ("ARM: uniphier: rework struct uniphier_board_data")
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>colibri-vf: Disable pull-up configuration in GPIO pin mux</title>
<updated>2016-03-02T13:47:16+00:00</updated>
<author>
<name>Bhuvanchandra DV</name>
<email>bhuvanchandra.dv@toradex.com</email>
</author>
<published>2016-02-24T08:33:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc9e8f2817d8024f2c1e0e13c80111a9fa4bbce9'/>
<id>fc9e8f2817d8024f2c1e0e13c80111a9fa4bbce9</id>
<content type='text'>
During very early boot-ROM execution the pinmux
configuration isi in Hi-Z state. If pull-up is enabled
on GPIO pad's there will be a short period of toggle
from high to low on the IO when GPIO is set low during
boot. To avoid this glitch, disable pull-up configuration
in GPIO pinmux.

Signed-off-by: Bhuvanchandra DV &lt;bhuvanchandra.dv@toradex.com&gt;
</content>
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<pre>
During very early boot-ROM execution the pinmux
configuration isi in Hi-Z state. If pull-up is enabled
on GPIO pad's there will be a short period of toggle
from high to low on the IO when GPIO is set low during
boot. To avoid this glitch, disable pull-up configuration
in GPIO pinmux.

Signed-off-by: Bhuvanchandra DV &lt;bhuvanchandra.dv@toradex.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sniper: Various minor cleanups, missing Kconfig configs and reorganisation</title>
<updated>2016-02-29T19:49:37+00:00</updated>
<author>
<name>Paul Kocialkowski</name>
<email>contact@paulk.fr</email>
</author>
<published>2016-02-26T12:18:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=23a004a63f617d565a9f714873fe60f31c9c548b'/>
<id>23a004a63f617d565a9f714873fe60f31c9c548b</id>
<content type='text'>
This introduces some minor cleanups, regarding aspects such as board name, code
and headers organization as well as deprecated and missing config options.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
This introduces some minor cleanups, regarding aspects such as board name, code
and headers organization as well as deprecated and missing config options.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: start.S: fix typo</title>
<updated>2016-02-29T19:49:35+00:00</updated>
<author>
<name>Yuichiro Goto</name>
<email>goto.yuichiro@espark.co.jp</email>
</author>
<published>2016-02-25T01:23:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ba10b852fe3a5d6188dfa43cced4bfbaf3515df1'/>
<id>ba10b852fe3a5d6188dfa43cced4bfbaf3515df1</id>
<content type='text'>
Fix typo in comment about position of 'A' bit in several start.S.

Signed-off-by: Yuichiro Goto &lt;goto.yuichiro@espark.co.jp&gt;
</content>
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<pre>
Fix typo in comment about position of 'A' bit in several start.S.

Signed-off-by: Yuichiro Goto &lt;goto.yuichiro@espark.co.jp&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: uniphier: fix warnings reported by aarch64 compiler</title>
<updated>2016-02-29T15:33:29+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-02-26T09:59:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11d3ede42ceccef9b5941ea7907f398cb97ed361'/>
<id>11d3ede42ceccef9b5941ea7907f398cb97ed361</id>
<content type='text'>
The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler.  Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler.  Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
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