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<title>u-boot.git/arch/arm, branch v2020.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm?h=v2020.04</id>
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<updated>2020-04-09T17:07:32Z</updated>
<entry>
<title>imx: Fix imx8m FIT script issue</title>
<updated>2020-04-09T17:07:32Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2020-04-09T08:44:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0db0ba6141f402b1d496ef53d9fa69978f75ec61'/>
<id>urn:sha1:0db0ba6141f402b1d496ef53d9fa69978f75ec61</id>
<content type='text'>
The FIT config node has reversed ATF and u-boot: ATF is set to 'firmware' but
u-boot is set to 'loadables'.
This script can work previously because spl fit driver wrongly appends fdt to
all loadable images. With the issue fixed in commit 9d15d1d1c24f ("Revert
"common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"") the
u-boot in 'loadables' does not have fdt appended and fails to work.  So correct
the script by moving u-boot to 'firmware' and ATF to 'loadables'.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reported-by: Matt Porter &lt;mporter@konsulko.com&gt;
Tested-by: Matt Porter &lt;mporter@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: imx8qxp-colibri: dm-pre-proper for pd_dma nodes</title>
<updated>2020-04-07T08:41:10Z</updated>
<author>
<name>Igor Opaniuk</name>
<email>igor.opaniuk@toradex.com</email>
</author>
<published>2020-03-27T10:28:16Z</published>
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<id>urn:sha1:eb719060ab2990fc5de038583dba15243f822c79</id>
<content type='text'>
pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
Reviewed-by: Oleksandr Suvorov &lt;oleksandr.suvorov@toradex.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: imx8qm-apalis: dm-pre-proper for pd_dma nodes</title>
<updated>2020-04-07T08:41:07Z</updated>
<author>
<name>Igor Opaniuk</name>
<email>igor.opaniuk@toradex.com</email>
</author>
<published>2020-03-27T10:28:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8fe92b804529265be44bfe8e99ce3e8e52043529'/>
<id>urn:sha1:8fe92b804529265be44bfe8e99ce3e8e52043529</id>
<content type='text'>
pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
Reviewed-by: Oleksandr Suvorov &lt;oleksandr.suvorov@toradex.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: imx8qxp-colibri: replace dm-spl with dm-pre-proper</title>
<updated>2020-04-07T08:41:02Z</updated>
<author>
<name>Igor Opaniuk</name>
<email>igor.opaniuk@toradex.com</email>
</author>
<published>2020-03-27T10:28:14Z</published>
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<id>urn:sha1:67c8e2826b096c898c640d9c5915a90c8f6173ea</id>
<content type='text'>
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.

Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
Reviewed-by: Oleksandr Suvorov &lt;oleksandr.suvorov@toradex.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: imx8qm-apalis: replace dm-spl with dm-pre-proper</title>
<updated>2020-04-07T08:40:56Z</updated>
<author>
<name>Igor Opaniuk</name>
<email>igor.opaniuk@toradex.com</email>
</author>
<published>2020-03-27T10:28:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=99897dd80d9db93c1c587a92d41240694f43bffb'/>
<id>urn:sha1:99897dd80d9db93c1c587a92d41240694f43bffb</id>
<content type='text'>
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.

Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
Reviewed-by: Oleksandr Suvorov &lt;oleksandr.suvorov@toradex.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: stm32: Temporarily drop cd-gpios from AV96 DT</title>
<updated>2020-04-05T23:07:13Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2020-04-02T16:53:41Z</published>
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<id>urn:sha1:a667cd8dd364031182dd0edfbee759f74f9c759f</id>
<content type='text'>
The card-detect GPIO and any other GPIO access currently doesn't work in
U-Boot SPL on any STM32 platform and crashes the SPL. To work around this
problem on AV96 right before release, remove the cd-gpios from DT. This
patch must be reverted right after release, once the proper fix for the
GPIO driver, "gpio: stm32: support gpio ops in SPL", is applied.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Cc: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Cc: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-tegra</title>
<updated>2020-04-03T20:05:46Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-04-03T20:05:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=60f1cc529ccc364e8374945a06ff2f7a2c54fb1e'/>
<id>urn:sha1:60f1cc529ccc364e8374945a06ff2f7a2c54fb1e</id>
<content type='text'>
- Add support for Jetson Nano, plus miscellaneous other fixes found
  during Nano bringup.
- Add Igor's update_uboot wrapper patches.
</content>
</entry>
<entry>
<title>mach-snapdragon: Fix overwriting last digit of serial number</title>
<updated>2020-04-03T15:47:47Z</updated>
<author>
<name>Jan-Christoph Tebbe</name>
<email>jan-christoph.tebbe@ithinx.io</email>
</author>
<published>2020-03-16T16:51:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=740370282e0caa9fab1c5865fe9b9a58ac008c5f'/>
<id>urn:sha1:740370282e0caa9fab1c5865fe9b9a58ac008c5f</id>
<content type='text'>
When generating the MAC address based on the boards serial number
the last digit was overwritten with the null termination. That way
boards with serial numbers close to each other would use the same
MAC address.

Signed-off-by: Jan-Christoph Tebbe &lt;Jan-Christoph.Tebbe@ithinx.io&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support</title>
<updated>2020-04-02T21:30:02Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2020-02-28T23:17:07Z</published>
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<id>urn:sha1:7c02bc9649f6d3afd272ac4a94b280495473834c</id>
<content type='text'>
The Jetson Nano Developer Kit is a Tegra X1-based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4GB
of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot
used for storage.

HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
Ethernet controller provides onboard network connectivity. NVMe support
has also been added. Env save is at the end of QSPI (4MB-8K).

A 40-pin header on the board can be used to extend the capabilities and
exposed interfaces of the Jetson Nano.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Tested-by: Peter Robinson &lt;pbrobinson@gmail.com&gt;
</content>
</entry>
<entry>
<title>mmc: t210: Fix 'bad' SD-card clock when doing 400KHz card detect</title>
<updated>2020-04-02T21:30:01Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2019-06-03T23:06:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a482f32992230d8bdae2caa72056ab7d9208d5f0'/>
<id>urn:sha1:a482f32992230d8bdae2caa72056ab7d9208d5f0</id>
<content type='text'>
According to the HW team, for some reason the normal clock select code
picks what appears to be a perfectly valid 375KHz SD card clock, based
on the CAR clock source and SDMMC1 controller register settings (CAR =
408MHz PLLP0 divided by 68 for 6MHz, then a SD Clock Control register
divisor of 16 = 375KHz). But the resulting SD card clock, as measured by
the HW team, is 700KHz, which is out-of-spec. So the WAR is to use the
values given in the TRM PLLP table to generate a 400KHz SD-clock (CAR
clock of 24.7MHz, SD Clock Control divisor of 62) only for SDMMC1 on
T210 when the requested clock is &lt;= 400KHz. Note that as far as I can
tell, the other requests for clocks in the Tegra MMC driver result in
valid SD clocks.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
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