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<title>u-boot.git/arch/blackfin/cpu/cpu.c, branch v2011.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/blackfin/cpu/cpu.c?h=v2011.09</id>
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<updated>2011-07-12T06:17:46Z</updated>
<entry>
<title>Blackfin: split out async setup</title>
<updated>2011-07-12T06:17:46Z</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2011-05-30T17:47:38Z</published>
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<id>urn:sha1:4150cec3353b7a6d7a3ea71b2d3c62deafff353d</id>
<content type='text'>
We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.

This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>Blackfin: set up simple NMI handlers for anomaly 05000219</title>
<updated>2010-07-05T08:18:18Z</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2010-05-05T06:07:44Z</published>
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<id>urn:sha1:ce53fc660114a2c23e6e8adbc197008b36ca444d</id>
<content type='text'>
Older on-chip Blackfin bootroms do not create a dummy NMI handler, so set
up one ourselves when anomaly 05000219 applies.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>blackfin: Move cpu/blackfin/* to arch/blackfin/cpu/*</title>
<updated>2010-04-13T07:13:25Z</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2010-04-13T03:28:13Z</published>
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<id>urn:sha1:c6fb83d21729321426308c3acff2a3dfb20d250b</id>
<content type='text'>
Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</content>
</entry>
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