u-boot.git/arch/microblaze/cpu, branch v2023.01

Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE

2022-10-31T15:01:31Z

The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

2022-06-27T14:15:50Z

Xilinx changes for v2022.10 cpu: - Add driver for microblaze cpu net: - Add support for DM_ETH_PHY to AXI emac and emaclite xilinx: - Switch platforms to DM_ETH_PHY - DT chagnes in ZynqMP and Zynq - Enable support for SquashFS zynqmp: - Add support for KR260 boards - Move BSS from address 0 - Move platform identification from board code to soc driver - Improve zynqmp_psu_init_minimize versal: - Enable loading app at EL1 serial: - Setup default address and clock rates for DEBUG uarts pinctrl: - Add support for tri state and output enable properties relocate-rela: - Clean relocate-rela implementation for ARM64 - Add support for Microblaze microblaze: - Add support for runtime relocation - Rework cache handling (wiring, Kconfig) based on cpuinfo - Remove interrupt support timer: - Extract axi timer driver from Microblaze to generic location

microblaze: Remove interrupt handler

2022-06-24T12:16:32Z

The primary purpose for this code was timer. By converting it to CONFIG_TIMER there is no code which uses this implementation that's why remove it. If there is a need to handle interrupts this patch can be reverted in future. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com

microblaze: Convert axi timer to DM driver

2022-06-24T12:16:32Z

Move axi timer driver from Microblaze to generic location. Origin implementation was irq based with counting down timer. CONFIG_TIMER drivers are designed differently that timer is free running up timer with automatic reload without any interrupt. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Michal Simek Tested-by: Ovidiu Panait Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com

cpu: add CPU driver for microblaze

2022-06-24T12:16:00Z

Add a basic CPU driver that retrieves information about the microblaze CPU core. cpu_ops handlers are implemented so that the "cpu" command can work properly: U-Boot-mONStR> cpu list 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 U-Boot-mONStR> cpu detail 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 ID = 0, freq = 50 MHz: L1 cache, MMU Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from linux. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-14-ovpanait@gmail.com Signed-off-by: Michal Simek

microblaze: add support for handling PVR data

2022-06-24T12:16:00Z

Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek

microblaze: cache: introduce flush_dcache_range()

2022-06-24T12:16:00Z

Align microblaze with the other architectures and provide an implementation for flush_dcache_range(). Also, remove the microblaze exception in drivers/core/device.c. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com Signed-off-by: Michal Simek

microblaze: cache: introduce cpuinfo structure

2022-06-24T12:16:00Z

Introduce a minimal cpuinfo structure to hold cache related info. The instruction/data cache size and cache line size are initialized early in the boot to default Kconfig values. They will be overwritten with data from PVR/dtb if the microblaze UCLASS_CPU driver is enabled. The cpuinfo struct was placed in global_data to allow the microblaze UCLASS_CPU driver to also run before relocation (initialized global data should be read-only before relocation). gd_cpuinfo() helper macro was added to avoid volatile "-Wdiscarded-qualifiers" warnings when using the pointer directly. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-10-ovpanait@gmail.com Signed-off-by: Michal Simek (s/bralid/brlid/)

microblaze: cache: introduce flush_cache_all()

2022-06-24T12:16:00Z

All flush_cache() calls in microblaze code are supposed to flush the entire instruction and data caches, so introduce flush_cache_all() helper to handle this. Also, provide implementations for flush_dcache_all() and invalidate_icache_all() so that icache and dcache u-boot commands can work. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-9-ovpanait@gmail.com Signed-off-by: Michal Simek

microblaze: cache: introduce Kconfig options for icache/dcache sizes

2022-06-24T12:16:00Z

Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek (s/bralid/brlid/g)