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<title>u-boot.git/arch/mips/cpu/mips32/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>MIPS: unify CPU code in arch/mips/cpu/</title>
<updated>2015-01-30T13:19:58+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2015-01-29T13:56:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eef88dfb3e16e4631e078f42714dbcef3216e3e1'/>
<id>eef88dfb3e16e4631e078f42714dbcef3216e3e1</id>
<content type='text'>
Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: move au1x00 SoC code to arch/mips/mach-au1x00</title>
<updated>2015-01-30T13:19:58+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2015-01-29T13:47:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d9a4a6223cc13fb43cbe291a00beeed1c847ed87'/>
<id>d9a4a6223cc13fb43cbe291a00beeed1c847ed87</id>
<content type='text'>
Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: unify cache initialization code</title>
<updated>2015-01-29T11:55:01+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2015-01-29T01:27:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a5d8898bca3e442b61e34b811aec8332752efd3'/>
<id>4a5d8898bca3e442b61e34b811aec8332752efd3</id>
<content type='text'>
The mips32 &amp; mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S &amp; remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 &amp; mips64 builds. The RA
register is defined differently to suit mips32 &amp; mips64, but will be
removed by a later commit in the series after further cleanup.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The mips32 &amp; mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S &amp; remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 &amp; mips64 builds. The RA
register is defined differently to suit mips32 &amp; mips64, but will be
removed by a later commit in the series after further cleanup.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>kbuild: use SoC-specific CONFIG to descend into SoC directory</title>
<updated>2014-11-23T11:49:02+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-11-13T03:28:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=56f31e872e83d23cc98300236ef882c73618d909'/>
<id>56f31e872e83d23cc98300236ef882c73618d909</id>
<content type='text'>
Use "obj-$(CONFIG_FOO) += foo/" where it is possible.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
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<pre>
Use "obj-$(CONFIG_FOO) += foo/" where it is possible.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>kbuild: Descend into SOC directory from CPU directory</title>
<updated>2014-11-23T11:49:02+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-11-13T03:28:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=165ecd26f036b1952dbf25823fbff7c0a403a29f'/>
<id>165ecd26f036b1952dbf25823fbff7c0a403a29f</id>
<content type='text'>
Some CPUs of some architectures have SOC directories.
At present, the build system directly descends into SOC directories
from the top Makefile, but it should generally descend into each
directory from its parent directory.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
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<pre>
Some CPUs of some architectures have SOC directories.
At present, the build system directly descends into SOC directories
from the top Makefile, but it should generally descend into each
directory from its parent directory.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: convert makefiles to Kbuild style</title>
<updated>2013-10-31T17:26:45+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-10-21T02:53:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f6e2c0f3e3bcb7c0b520b0e65de3f080f831fcf7'/>
<id>f6e2c0f3e3bcb7c0b520b0e65de3f080f831fcf7</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
</content>
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<pre>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1a4596601fd395f3afb8f82f3f840c5e00bdd57a'/>
<id>1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Move timer code to arch/mips/cpu/$(CPU)/</title>
<updated>2011-05-09T15:12:31+00:00</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>skuribay@pobox.com</email>
</author>
<published>2011-05-06T15:18:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=68cebb8027c282a949ac0ca7dcb5baabd1c6879a'/>
<id>68cebb8027c282a949ac0ca7dcb5baabd1c6879a</id>
<content type='text'>
Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available.  But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources.  And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.

With this change, each $(CPU)/ directory can have its own timer code.

Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available.  But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources.  And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.

With this change, each $(CPU)/ directory can have its own timer code.

Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory</title>
<updated>2011-04-02T13:07:12+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@googlemail.com</email>
</author>
<published>2011-03-28T16:33:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ea2f0cb35cb488f27b3f1625396e874fcbf309e0'/>
<id>ea2f0cb35cb488f27b3f1625396e874fcbf309e0</id>
<content type='text'>
Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Cc: Thomas Lange &lt;thomas@corelatus.se&gt;
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Cc: Thomas Lange &lt;thomas@corelatus.se&gt;
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory</title>
<updated>2011-04-02T13:07:12+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@googlemail.com</email>
</author>
<published>2011-03-28T16:33:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6235df946ed391dc2ca5e5a9e8f05c02d7c2d3be'/>
<id>6235df946ed391dc2ca5e5a9e8f05c02d7c2d3be</id>
<content type='text'>
IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
</pre>
</div>
</content>
</entry>
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