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<title>u-boot.git/arch/mips/cpu/mips32, branch v2012.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/mips/cpu/mips32?h=v2012.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/mips/cpu/mips32?h=v2012.07'/>
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<updated>2012-05-23T19:19:21Z</updated>
<entry>
<title>net: Fix remaining API interface breakage</title>
<updated>2012-05-23T19:19:21Z</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2012-05-22T18:36:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=10cbe3b6a4b2289906fc94bb26810191607ee748'/>
<id>urn:sha1:10cbe3b6a4b2289906fc94bb26810191607ee748</id>
<content type='text'>
These are all the files which use the API incorrectly but did not get
built using MAKEALL -a powerpc|arm.  I have no compiler for them, but
the remaining issues should be far less than without this patch.

Any outstanding issues are left to the maintainers of boards that use
these drivers.

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>MIPS: fix endianess handling</title>
<updated>2012-04-02T13:54:53Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@googlemail.com</email>
</author>
<published>2012-04-02T02:57:56Z</published>
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<id>urn:sha1:6cb461b4f1531dbae5c0bae857f649b7943114ec</id>
<content type='text'>
Make endianess of target CPU configurable. Use the new config
option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through
endianess options to LD.

Build tested with:
 - ELDK 4 mips_4KC- and mips4KCle
 - Sourcery CodeBench Lite 2011.03-93

With this patch all 26 MIPS boards can be compiled now in one step by
running "MAKEALL -a mips".

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: fix inconsistency in config option for cache operation mode</title>
<updated>2012-04-02T13:54:53Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@googlemail.com</email>
</author>
<published>2012-04-02T02:57:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=979cfeaf36bf8719d4a1a98f1e8a3e16ef3d1fba'/>
<id>urn:sha1:979cfeaf36bf8719d4a1a98f1e8a3e16ef3d1fba</id>
<content type='text'>
Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to
use the new config option in dcache_enable().

Fix this to avoid inconsistencies if someone wants to disable
and enable D-caches.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
</content>
</entry>
<entry>
<title>usb: replace wait_ms() with mdelay()</title>
<updated>2012-03-18T23:08:16Z</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2012-03-05T13:47:00Z</published>
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<id>urn:sha1:5b84dd67cfd8c07c4adff935310224a03d0c4d01</id>
<content type='text'>
Common code has a mdelay() func, so use that instead of the usb-specific
wait_ms() func.  This also fixes the build errors:

ohci-hcd.c: In function 'submit_common_msg':
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1519:9: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1816:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1827:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1844:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1563:11: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1583:9: sorry, unimplemented: called from here
make[1]: *** [ohci-hcd.o] Error 1

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>consolidate mdelay by providing a common function for all users</title>
<updated>2011-10-21T23:16:08Z</updated>
<author>
<name>Anatolij Gustschin</name>
<email>agust@denx.de</email>
</author>
<published>2011-10-12T02:31:39Z</published>
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<id>urn:sha1:c4c9fbebae6a62d538817d0ccee698adaafc5d66</id>
<content type='text'>
There are several mdelay() definitions in the driver and
board code. Remove them all and provide a common mdelay()
in lib/time.c.

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Acked-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>MIPS: mips32: fix wrong loop bound in flush_cache()</title>
<updated>2011-09-03T01:43:45Z</updated>
<author>
<name>Yao Cheng</name>
<email>saturdaycoder@gmail.com</email>
</author>
<published>2011-08-10T07:11:16Z</published>
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<id>urn:sha1:dc344589ded4fb4d63ba7f0cdf670e2ffcf5e5a0</id>
<content type='text'>
The issue is found when calling flush_cache() with zero "size" argument.
The bound of loop is miscalculated in this case and flush_cache() enters
a wrong flushing loop.

Signed-off-by: Yao Cheng &lt;saturdaycoder@gmail.com&gt;
Cc: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
Cc: Sergei Shtylyov &lt;sshtylyov@mvista.com&gt;
Cc: Mike Frysinger &lt;vapier@gentoo.org&gt;
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;</content>
</entry>
<entry>
<title>MIPS: make cache operation mode configurable</title>
<updated>2011-07-31T14:26:41Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@googlemail.com</email>
</author>
<published>2011-07-27T11:22:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ab2a98b11716364bc5a8c43cdfa7fee176cda1d8'/>
<id>urn:sha1:ab2a98b11716364bc5a8c43cdfa7fee176cda1d8</id>
<content type='text'>
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.

This patch makes the cache operation mode configurable via board config.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Acked-by: Thomas Langer &lt;thomas.langer@lantiq.com&gt;
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;</content>
</entry>
<entry>
<title>MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG</title>
<updated>2011-07-31T14:26:41Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@googlemail.com</email>
</author>
<published>2011-07-27T11:22:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7185adb48ef1e5b0f05263a7f791de340ddddeb2'/>
<id>urn:sha1:7185adb48ef1e5b0f05263a7f791de340ddddeb2</id>
<content type='text'>
This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Acked-by: Thomas Langer &lt;thomas.langer@lantiq.com&gt;
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;</content>
</entry>
<entry>
<title>Timer: Remove reset_timer() for non-Nios2 arches</title>
<updated>2011-07-26T12:53:30Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-07-15T02:19:44Z</published>
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<id>urn:sha1:4769be21cca65f1e7bef27bc024d886842bc6bad</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Timer: Remove set_timer completely</title>
<updated>2011-07-26T12:52:17Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-07-15T02:18:12Z</published>
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<id>urn:sha1:5c8404aff16c2a207a11e1af5843e1009bf9fb01</id>
<content type='text'>
</content>
</entry>
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