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<title>u-boot.git/arch/mips/cpu/start.S, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN</title>
<updated>2023-10-06T18:38:12+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-09-26T14:14:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3d6d50751469fbadec3e34fbb6d06f21746619dd'/>
<id>3d6d50751469fbadec3e34fbb6d06f21746619dd</id>
<content type='text'>
Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the
malloc pool exists.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
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<pre>
Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the
malloc pool exists.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h</title>
<updated>2022-06-06T16:09:19+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-05-25T16:16:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eaf6ea6a1dc10d49cdcbcad0f8b0abb6c1eb1db1'/>
<id>eaf6ea6a1dc10d49cdcbcad0f8b0abb6c1eb1db1</id>
<content type='text'>
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig</title>
<updated>2021-08-31T21:47:49+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-08-28T01:18:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a2ac2b964bfbb20d6791ee94b9034a50cfadb5b0'/>
<id>a2ac2b964bfbb20d6791ee94b9034a50cfadb5b0</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SKIP_LOWLEVEL_INIT
   CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
This converts the following to Kconfig:
   CONFIG_SKIP_LOWLEVEL_INIT
   CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: start.S: Add Octeon boot header compatibility</title>
<updated>2020-11-30T17:31:56+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-10-28T14:09:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=de24bc7e0e3528f3d3c4731ab053a3e8d621ab7a'/>
<id>de24bc7e0e3528f3d3c4731ab053a3e8d621ab7a</id>
<content type='text'>
Octeon has a specific boot header, when booted via SPI NOR, NAND or MMC.
Here the only 2 instructions are allowed in the first few bytes of the
image. And these instructions need to be one branch and a nop. This
patch adds the necessary nop after the nop, to that the common MIPS
image is compatible with this Octeon header.

The tool to patch the Octeon boot header into the image will be send in
a follow-up patch.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Aaron Williams &lt;awilliams@marvell.com&gt;
Cc: Chandrakala Chavva &lt;cchavva@marvell.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
Octeon has a specific boot header, when booted via SPI NOR, NAND or MMC.
Here the only 2 instructions are allowed in the first few bytes of the
image. And these instructions need to be one branch and a nop. This
patch adds the necessary nop after the nop, to that the common MIPS
image is compatible with this Octeon header.

The tool to patch the Octeon boot header into the image will be send in
a follow-up patch.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Aaron Williams &lt;awilliams@marvell.com&gt;
Cc: Chandrakala Chavva &lt;cchavva@marvell.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-06-30T10:33:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=de34a61642eda0b64b34dd4d9eeda57eb01f76bc'/>
<id>de34a61642eda0b64b34dd4d9eeda57eb01f76bc</id>
<content type='text'>
This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code.  Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.

It will be used by thje Octeon platform.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code.  Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.

It will be used by thje Octeon platform.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: sync asm/mipsregs.h with Linux 5.7</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T23:46:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=81d4b14f7e7e4492d99af96c42be7fd8b26eb4d7'/>
<id>81d4b14f7e7e4492d99af96c42be7fd8b26eb4d7</id>
<content type='text'>
Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: add config options for generic cache setup code</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T22:45:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=57bfb1aed6a87b19ca7e2a76df83ea387621e2e9'/>
<id>57bfb1aed6a87b19ca7e2a76df83ea387621e2e9</id>
<content type='text'>
Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.

Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.

Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.

Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.

Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: refactor disabling of caches</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T22:45:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=60772433dd42987f3b965188d9577150084b8956'/>
<id>60772433dd42987f3b965188d9577150084b8956</id>
<content type='text'>
Logically this code belongs to cache_init.S.

If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Logically this code belongs to cache_init.S.

If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: start.S: remove dead code</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T22:45:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=54e7fbd5adef2ca68d3e3723516651fc9f096d0b'/>
<id>54e7fbd5adef2ca68d3e3723516651fc9f096d0b</id>
<content type='text'>
Since commit 703ec9ddf965 ("MIPS: Stop building position independent code")
the relocation code was completely reworked and removed from start.S.
Remove some left-overs of the old code.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
Since commit 703ec9ddf965 ("MIPS: Stop building position independent code")
the relocation code was completely reworked and removed from start.S.
Remove some left-overs of the old code.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: add a option to support not reserving malloc space on initial stack</title>
<updated>2020-04-27T18:29:33+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-04-21T07:28:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c95c3ec025f46b6d65f87bc1010eae76c4152334'/>
<id>c95c3ec025f46b6d65f87bc1010eae76c4152334</id>
<content type='text'>
The initial stack on some platforms is too small to hold a large malloc
space. This patch adds a option to allow these platforms not reserving the
malloc space on initial stack. These platforms should set the malloc base
after DRAM is usable.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
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<pre>
The initial stack on some platforms is too small to hold a large malloc
space. This patch adds a option to allow these platforms not reserving the
malloc space on initial stack. These platforms should set the malloc base
after DRAM is usable.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
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