u-boot.git/arch/mips/cpu, branch v2014.01

qemu-malta: rename to just "malta"

2013-11-09T16:21:01+00:00

This is in preparation for adapting this board to function correctly on
a physical MIPS Malta board. The board is moved into an "imgtec" vendor
directory at the same time in order to ready us for any other boards
supported by Imagination in the future.

Signed-off-by: Paul Burton

mips32: detect L1 cache sizes if they're not defined

2013-11-09T16:21:01+00:00

For boards such as the MIPS Malta with an FPGA core card it is desirable
to be able to detect the L1 cache sizes at runtime, since they are not
dependant upon the board but on the FPGA bitstream in use. This patch
performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
not defined by the board configuration. In cases where the sizes are
detected this patch also removes the restriction that the I-cache &
D-cache line sizes must be the same, as this is not necessarily true.

If the cache sizes are defined by a configuration then they will be
hardcoded as before, so this patch will not add overhead to such
boards.

Signed-off-by: Paul Burton

mips: convert makefiles to Kbuild style

2013-10-31T17:26:45+00:00

Signed-off-by: Masahiro Yamada 
Cc: Daniel Schwierzeck

usb: add enum usb_init_type parameter to usb_lowlevel_init

2013-10-20T21:45:26+00:00

This parameter will later be used to verify OTG ports.

Signed-off-by: Troy Kisky

Coding Style cleanup: remove trailing white space

2013-10-14T20:06:53+00:00

Signed-off-by: Wolfgang Denk

MIPS: mips32/cache.S: use v1 register for indirect function calls

2013-07-24T13:51:07+00:00

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos 
Cc: Daniel Schwierzeck

MIPS: mips32/cache.S: store cache line size in t8 register

2013-07-24T13:51:07+00:00

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos 
Cc: Daniel Schwierzeck

MIPS: mips32/cache.S: save return address in t9 register

2013-07-24T13:51:06+00:00

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos 
Cc: Daniel Schwierzeck

MIPS: xburst/start.S: rework relocation info check

2013-07-24T13:51:06+00:00

Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos 
Cc: Daniel Schwierzeck

MIPS: xburst/start.S: use t8 register for dynamic relocation

2013-07-24T13:51:06+00:00

Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos 
Cc: Daniel Schwierzeck