u-boot.git/arch/mips/cpu, branch v2016.01

MIPS: unify CPU code in arch/mips/cpu/

2015-01-30T13:19:58+00:00

Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.

Signed-off-by: Paul Burton 
Signed-off-by: Daniel Schwierzeck

MIPS: move au1x00 SoC code to arch/mips/mach-au1x00

2015-01-30T13:19:58+00:00

Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.

Signed-off-by: Daniel Schwierzeck 
Cc: Paul Burton

MIPS: handle mips64 ST0_KX bit in mips32 start.S

2015-01-30T13:19:58+00:00

In preparation for sharing a single copy of start.S between mips32 &
mips64, handle setting the KX bit of the cop0 Status register when the
mips32 start.S is built for mips64.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: handle mips64 relocs in mips32 start.S

2015-01-30T13:19:58+00:00

In preparation for sharing a single copy of start.S between mips32 &
mips64, handle mips64 relocations in the mips32 start.S when built for
mips64.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: use asm.h macros in mips32 start.S

2015-01-30T13:19:57+00:00

Where the mips32 & mips64 implementations of start.S differ in terms of
access sizes & offsets, use the appropriate macros from asm.h to
abstract those differences away. This is in preparation for sharing a
single copy of start.S between mips32 & mips64.

The exception to this is loads of immediates to be written to the cop0
Config register, which is a 32bit register on mips64 and therefore
constants written to it can be loaded as such.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: unify cache initialization code

2015-01-29T11:55:01+00:00

The mips32 & mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 & mips64 builds. The RA
register is defined differently to suit mips32 & mips64, but will be
removed by a later commit in the series after further cleanup.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: unify cache maintenance functions

2015-01-29T11:55:00+00:00

Move the more developed mips32 version of the cache maintenance
functions to a common arch/mips/lib/cache.c, in order to reduce
duplication between mips32 & mips64.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: avoid .set ISA for cache operations

2015-01-29T11:55:00+00:00

As a step towards unifying the cache maintenance code for mips32 &
mips64 CPUs, stop using ".set " directives in the more developed
mips32 version of the code. Instead, when present make use of the GCC
builtin for emitting a cache instruction. When not present, simply don't
bother with the .set directives since U-boot always builds with
-march=mips32 or higher anyway.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: add support for pre-relocation malloc

2015-01-21T13:07:23+00:00

Implement MIPS specific setup of the gd_t structure to support
pre-relocation malloc. If CONFIG_SYS_MALLOC_F_LEN is specified,
a memory area will be reserved after the initial stack area and
the gd->malloc_base pointer will be initialized.

After this patch the new driver model can be used on MIPS.

Signed-off-by: Daniel Schwierzeck

MIPS: add support for CONFIG_SYS_INIT_SP_ADDR

2015-01-21T13:07:16+00:00

Support the existing config option CONFIG_SYS_INIT_SP_ADDR on
MIPS. This allows to move the initial stack to other places
than the beginning of RAM.

Signed-off-by: Daniel Schwierzeck