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<title>u-boot.git/arch/mips/dts/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge patch series "MIPS: Boston: Various enhancements"</title>
<updated>2025-04-22T21:13:21+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-22T21:13:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=20fcb6305eef553a94eeed6efb1a60ee3ccd9db7'/>
<id>20fcb6305eef553a94eeed6efb1a60ee3ccd9db7</id>
<content type='text'>
Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt; says:

This is a huge series which promoted MIPS/Boston target into a
usable state, with fixes to drivers and general framework issues
I found in this process.

I also converted the target to OF_UPSTREAM.

This target is covered by QEMU, to test on QEMU:
```
make boston64r6el_defconfig
make
qemu-system-mips64el -M boston -cpu I6500 -bios ./u-boot.bin -nographic
```

Link: https://lore.kernel.org/r/20240517-boston-v3-0-1ea7d23f4a1d@flygoat.com
</content>
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<pre>
Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt; says:

This is a huge series which promoted MIPS/Boston target into a
usable state, with fixes to drivers and general framework issues
I found in this process.

I also converted the target to OF_UPSTREAM.

This target is covered by QEMU, to test on QEMU:
```
make boston64r6el_defconfig
make
qemu-system-mips64el -M boston -cpu I6500 -bios ./u-boot.bin -nographic
```

Link: https://lore.kernel.org/r/20240517-boston-v3-0-1ea7d23f4a1d@flygoat.com
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: boston: Migrate to OF_UPSTREAM</title>
<updated>2025-04-22T21:08:47+00:00</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2024-05-17T18:14:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4ba5026a0fb4a4a3825e250d8e76f07b5a5e4609'/>
<id>4ba5026a0fb4a4a3825e250d8e76f07b5a5e4609</id>
<content type='text'>
We can now boot with upstream devicetree.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
We can now boot with upstream devicetree.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dts: Deduplicate dtbs target</title>
<updated>2024-10-15T01:32:04+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2024-10-04T00:10:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d2061828a4c1b60b44cd2307b6a782ac2efbffbe'/>
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<content type='text'>
The dtbs: target is almost identical in all architecture Makefiles.
All architecture Makefiles include scripts/Makefile.dts . Deduplicate
the dtbs: target into scripts/Makefile.dts . No functional change.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt; #qcom, OF_UPSTREAM
</content>
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<pre>
The dtbs: target is almost identical in all architecture Makefiles.
All architecture Makefiles include scripts/Makefile.dts . Deduplicate
the dtbs: target into scripts/Makefile.dts . No functional change.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt; #qcom, OF_UPSTREAM
</pre>
</div>
</content>
</entry>
<entry>
<title>bmips: Add Inteno XG6846 board</title>
<updated>2023-11-06T15:20:21+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2023-09-26T09:23:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a01b946e567455b77a8736b6588af859ecf40a56'/>
<id>a01b946e567455b77a8736b6588af859ecf40a56</id>
<content type='text'>
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.

The default boot will read a uImage from flash and boot it.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
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<pre>
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.

The default boot will read a uImage from flash and boot it.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: mtmips: add two reference boards for mt7621</title>
<updated>2022-07-13T21:03:37+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-05-20T03:22:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0eaee027f7f352666d583d67d85cdd64d79ef121'/>
<id>0eaee027f7f352666d583d67d85cdd64d79ef121</id>
<content type='text'>
The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.

The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and SDXC is not available.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.

The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and SDXC is not available.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dts: automatically build necessary .dtb files</title>
<updated>2022-02-09T19:26:12+00:00</updated>
<author>
<name>Rasmus Villemoes</name>
<email>rasmus.villemoes@prevas.dk</email>
</author>
<published>2022-01-10T13:34:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3609e1dc5f4d4c238dcd23e045ba6223310feffa'/>
<id>3609e1dc5f4d4c238dcd23e045ba6223310feffa</id>
<content type='text'>
When building for a custom board, it is quite common to maintain a
private branch which include some defconfig and .dts files. But to
hook up those .dts files requires modifying a file "belonging" to
upstream U-Boot, the arch/*/dts/Makefile. Forward-porting that branch
to a newer upstream then often results in a conflict which, while it
is trivial to resolve by hand, makes it harder to have a CI do "try to
build our board against latest upstream".

The .config usually includes information on precisely what .dtb(s) are
needed, so to avoid having to modify the Makefile, simply add the
files in (SPL_)OF_LIST to dtb-y.

A technicality is that (SPL_)OF_LIST is not always defined, so rework
the Kconfig symbols so that (SPL_)OF_LIST is always defined (when
(SPL_)OF_CONTROL), but only prompted for in the cases which used to be
their "depends on".

nios2 and microblaze already have something like this in their
dts/Makefile, and the rationale in commit 41f59f68539 is similar to
the above. So this simply generalizes existing practice. Followup
patches could remove the logic in those two makefiles, just as there's
potential for moving some common boilerplate from all the
arch/*/dts/Makefile files to the new scripts/Makefile.dts.

Signed-off-by: Rasmus Villemoes &lt;rasmus.villemoes@prevas.dk&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When building for a custom board, it is quite common to maintain a
private branch which include some defconfig and .dts files. But to
hook up those .dts files requires modifying a file "belonging" to
upstream U-Boot, the arch/*/dts/Makefile. Forward-porting that branch
to a newer upstream then often results in a conflict which, while it
is trivial to resolve by hand, makes it harder to have a CI do "try to
build our board against latest upstream".

The .config usually includes information on precisely what .dtb(s) are
needed, so to avoid having to modify the Makefile, simply add the
files in (SPL_)OF_LIST to dtb-y.

A technicality is that (SPL_)OF_LIST is not always defined, so rework
the Kconfig symbols so that (SPL_)OF_LIST is always defined (when
(SPL_)OF_CONTROL), but only prompted for in the cases which used to be
their "depends on".

nios2 and microblaze already have something like this in their
dts/Makefile, and the rationale in commit 41f59f68539 is similar to
the above. So this simply generalizes existing practice. Followup
patches could remove the logic in those two makefiles, just as there's
potential for moving some common boilerplate from all the
arch/*/dts/Makefile files to the new scripts/Makefile.dts.

Signed-off-by: Rasmus Villemoes &lt;rasmus.villemoes@prevas.dk&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: octeon: Add Octeon III NIC23 board support</title>
<updated>2021-04-23T19:22:55+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2021-04-07T07:12:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ec85347102f0ab24b16827ea0c0aa9b59d80bee8'/>
<id>ec85347102f0ab24b16827ea0c0aa9b59d80bee8</id>
<content type='text'>
This patch adds the basic support for the PCIe target board equipped
with the Octeon III CN2350 SoC.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds the basic support for the PCIe target board equipped
with the Octeon III CN2350 SoC.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: mtmips: add two reference boards for mt7620</title>
<updated>2021-01-24T20:39:26+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-11-12T08:35:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=76880b08c4cf0e04332b17fd02bce0340289ccc2'/>
<id>76880b08c4cf0e04332b17fd02bce0340289ccc2</id>
<content type='text'>
The mt7620_rfb board supports integrated 10/100M PHYs plus two external
giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB.

The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a
16MB SPI-NOR flash.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The mt7620_rfb board supports integrated 10/100M PHYs plus two external
giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB.

The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a
16MB SPI-NOR flash.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: dts: switch to board defines for dtb for mtmips</title>
<updated>2021-01-24T20:39:26+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-11-12T08:35:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da41a56059a114725684cc61c93f5f768d1ac734'/>
<id>da41a56059a114725684cc61c93f5f768d1ac734</id>
<content type='text'>
Previous the dts files for gardena-smart-gateway-mt7688 and
linkit-smart-7688 are set to be built when mtmips is selected.

This can lead to a compilation error if another soc is added to this arch
with different dtsi files.

So it's better to build the dtb only if their board is selected.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
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<pre>
Previous the dts files for gardena-smart-gateway-mt7688 and
linkit-smart-7688 are set to be built when mtmips is selected.

This can lead to a compilation error if another soc is added to this arch
with different dtsi files.

So it's better to build the dtb only if their board is selected.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: octeon: Add minimal Octeon 3 EBB7304 EVK support</title>
<updated>2020-07-18T13:47:50+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-06-30T10:08:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5fef24c912a44a08ab644aa16ceb5a435491f9d9'/>
<id>5fef24c912a44a08ab644aa16ceb5a435491f9d9</id>
<content type='text'>
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.

Supported devices:
- UART
- reset
- CFI parallel NOR flash

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.

Supported devices:
- UART
- reset
- CFI parallel NOR flash

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
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