u-boot.git/arch/mips/include/asm/cache.h, branch v2016.05

MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFT

2016-01-16T20:06:46+00:00

Add Kconfig symbol for L1 cache shift like the kernel does.
The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source
for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS.
If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the
cache sizes are automatically detected and ARCH_DMA_MINALIGN
would be set to 128 Bytes.

The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which
corresponds to 32 Bytes. All current MIPS boards already used
that value. While on it, fix the Malta board to use a value of 6
like the kernel port does.

Signed-off-by: Daniel Schwierzeck

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24T13:44:38+00:00

Signed-off-by: Wolfgang Denk 
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini

mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment

2011-10-23T18:50:43+00:00

Signed-off-by: Anton Staaf 
Cc: Mike Frysinger 
Cc: Lukasz Majewski 
Cc: Shinya Kuribayashi