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<title>u-boot.git/arch/mips/include/asm/io.h, branch v2020.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2018-11-14T17:16:27Z</updated>
<entry>
<title>mips: Implement {in, out}_{le, be}_{16, 32, 64} and {in, out}_8</title>
<updated>2018-11-14T17:16:27Z</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-10-15T07:24:09Z</published>
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<id>urn:sha1:4d9ada54a269c4ded01d60f7c231fd1a3a436a25</id>
<content type='text'>
MIPS is the only architecture currently supported by U-Boot that does
not implement any of the in/out register access functions.

To have a interface that is useable across architectures, add the
functions to the MIPS architecture (implemented using the __raw_write
and __raw_read functions).

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06Z</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>mips: Use asm-generic/io.h</title>
<updated>2017-10-03T01:52:23Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2017-09-14T22:05:10Z</published>
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<id>urn:sha1:d1cbeafd5e5e43ec8869a6e5e0b6dd720e51252a</id>
<content type='text'>
Convert the mips architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As mips actually performs
non-identity mapping between physical &amp; virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Acked-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Fix map_physmem for cached mappings</title>
<updated>2016-11-30T15:18:19Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-09-26T18:28:57Z</published>
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<id>urn:sha1:6fd596a1aa57bd431263f45b0c57ee8ae6b2403c</id>
<content type='text'>
map_physmem should return a pointer that can be used by the CPU to
access the given memory - on MIPS simply returning the physical address
as it does prior to this patch doesn't achieve that. Instead return a
pointer to the memory within (c)kseg0, which matches up consistently
with the (c)kseg1 pointer that uncached mappings return via ioremap.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Use CPHYSADDR to implement mips32 virt_to_phys</title>
<updated>2016-05-31T07:38:11Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-05-26T13:49:33Z</published>
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<id>urn:sha1:2e4cc1c5d4fabee86fc2985fac18f9a2023e39f8</id>
<content type='text'>
Use CPHYSADDR to implement the virt_to_phys function for converting from
a virtual to a physical address for MIPS32, much as is already done for
MIPS64. This allows for virt_to_phys to work regardless of whether the
address being translated is in kseg0 or kseg1, unlike the previous
subtraction based approach which only worked for addresses in kseg0.
This allows for drivers to provide an address to virt_to_phys without
needing to manually ensure that kseg1 addresses are converted to
equivalent kseg0 addresses first.

This patch is equivalent to this Linux patch currently waiting to be
reviewed &amp; merged:

    https://patchwork.linux-mips.org/patch/12564/

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Support dynamic I/O port base address</title>
<updated>2016-02-01T21:13:25Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-01-29T13:54:52Z</published>
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<id>urn:sha1:05e342554e51767830d7e60f2dab09192fd2a0e1</id>
<content type='text'>
The existing mips_io_port_base variable isn't suitable for use early
during boot since it will be stored in the .data section which may not
be writable pre-relocation. Fix this by moving the I/O port base address
into struct arch_global_data. In order to avoid adding this field for
all targets, make this dependant upon a new Kconfig entry
CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a
non-zero I/O port base, so select this option only for Malta.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove SLOW_DOWN_IO</title>
<updated>2016-02-01T21:13:25Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-01-29T13:54:51Z</published>
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<id>urn:sha1:8ac493cd65ea2af5f9b79f7f71edf543b46da112</id>
<content type='text'>
CONF_SLOWDOWN_IO is never set for any target, so remove the dead code in
the SLOW_DOWN_IO macro. This is done in preparation for changes to
mips_io_port_base which can be avoided in this path by removing it
entirely.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
</entry>
<entry>
<title>mips: asm/io.h: Add in &lt;linux/bug.h&gt;</title>
<updated>2016-01-25T23:52:23Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-01-25T23:52:23Z</published>
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<id>urn:sha1:d6ea6d88769e85f6873a94065a1ba167c9b592da</id>
<content type='text'>
As part of the bug.h / BUILD_BUG_* clean up, this file was missed.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>MIPS: implement bit manipulating I/O accessors</title>
<updated>2016-01-16T20:06:46Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2016-01-15T14:54:48Z</published>
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<id>urn:sha1:0e0efb40b874633360967f532eb1ed59ad02adbe</id>
<content type='text'>
Add support for functions clrbits_X(), setbits_X() and clrsetbits_X()
on MIPS.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: sync I/O related header files with linux-4.4</title>
<updated>2016-01-16T20:06:46Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2016-01-12T20:48:25Z</published>
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<id>urn:sha1:23ff8633fd8ca75d2ffd4595b9c72bb1a5fdbd20</id>
<content type='text'>
Mainly sync asm/io.h to get a working ioremap() implementation
as well as the full set of I/O accessors. Pull in additional
header files to make this work.

Furthermore port over the directory 'arch/mips/include/asm/mach-generic/'
with contains default definitions for I/O and memory spaces and default
implementations for mapping those spaces. All files in that directory
can be overwritten by a SoC/machine.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
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