u-boot.git/arch/mips/include/asm, branch v2016.09

MIPS: Split I & D cache line size config

2016-05-31T07:44:24+00:00

Allow L1 Icache & L1 Dcache line size to be specified separately, since
there's no architectural mandate that they be the same. The
[id]cache_line_size functions are tidied up to take advantage of the
fact that the Kconfig entries are always present to simply check them
for zero rather than needing to #ifdef on their presence.

Signed-off-by: Paul Burton 
[removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h]
Signed-off-by: Daniel Schwierzeck

MIPS: remove dead code from asm/u-boot-mips.h

2016-05-31T07:38:11+00:00

Those wrappers for linker symbols were once used in the MIPS
specific board.c implementation. Since the migration to generic
board.c, those wrappers are dead code and can be removed.

Signed-off-by: Daniel Schwierzeck

MIPS: Use CPHYSADDR to implement mips32 virt_to_phys

2016-05-31T07:38:11+00:00

Use CPHYSADDR to implement the virt_to_phys function for converting from
a virtual to a physical address for MIPS32, much as is already done for
MIPS64. This allows for virt_to_phys to work regardless of whether the
address being translated is in kseg0 or kseg1, unlike the previous
subtraction based approach which only worked for addresses in kseg0.
This allows for drivers to provide an address to virt_to_phys without
needing to manually ensure that kseg1 addresses are converted to
equivalent kseg0 addresses first.

This patch is equivalent to this Linux patch currently waiting to be
reviewed & merged:

    https://patchwork.linux-mips.org/patch/12564/

Signed-off-by: Paul Burton

mips: Drop unused code in u-boot.h

2016-05-27T19:39:53+00:00

Since generic board init is enabled, this is not used. Drop it.

Signed-off-by: Simon Glass 
Acked-by: Daniel Schwierzeck

mips: Drop JZ4740 remnants

2016-05-25T23:34:14+00:00

Remove the remnants of JZ4740 support.

Signed-off-by: Marek Vasut 
Cc: Daniel Schwierzeck 
Cc: Paul Burton

mips: add base support for QCA/Atheros ath79 SOCs

2016-05-20T23:25:50+00:00

This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset and CPU detection.

Signed-off-by: Wills Wang

MIPS: fix mips_cache fallback without __builtin_mips_cache

2016-03-09T10:00:40+00:00

The "R" constraint supplies the address of an variable in a register. Use
"r" instead and adjust asm to supply the content of addr in a register
instead.

Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations")
Signed-off-by: Matthias Schiffer 
Cc: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: Support dynamic I/O port base address

2016-02-01T21:13:25+00:00

The existing mips_io_port_base variable isn't suitable for use early
during boot since it will be stored in the .data section which may not
be writable pre-relocation. Fix this by moving the I/O port base address
into struct arch_global_data. In order to avoid adding this field for
all targets, make this dependant upon a new Kconfig entry
CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a
non-zero I/O port base, so select this option only for Malta.

Signed-off-by: Paul Burton

MIPS: Remove SLOW_DOWN_IO

2016-02-01T21:13:25+00:00

CONF_SLOWDOWN_IO is never set for any target, so remove the dead code in
the SLOW_DOWN_IO macro. This is done in preparation for changes to
mips_io_port_base which can be avoided in this path by removing it
entirely.

Signed-off-by: Paul Burton

mips: asm/io.h: Add in

2016-01-25T23:52:23+00:00

As part of the bug.h / BUILD_BUG_* clean up, this file was missed.

Signed-off-by: Tom Rini