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<title>u-boot.git/arch/mips/include, branch v2014.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>malta: enable PIIX4 SERIRQ</title>
<updated>2013-11-26T20:49:34+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-26T17:45:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bea12b782337105feeb3aeb0875d110eed007803'/>
<id>bea12b782337105feeb3aeb0875d110eed007803</id>
<content type='text'>
Whilst U-boot does not require this itself, Linux currently relies upon
it having been muxed and enabled by the bootloader. Thus in order to
preserve compatibility with current kernels before a fix is merged in
Linux we will enable the SERIRQ interrupt and mux it to its pin.

Without doing this current kernels will never receive serial port
interrupts and the end result is typically that userland appears to
hang.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
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<pre>
Whilst U-boot does not require this itself, Linux currently relies upon
it having been muxed and enabled by the bootloader. Thus in order to
preserve compatibility with current kernels before a fix is merged in
Linux we will enable the SERIRQ interrupt and mux it to its pin.

Without doing this current kernels will never receive serial port
interrupts and the end result is typically that userland appears to
hang.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>malta: use unmapped flash base address</title>
<updated>2013-11-15T10:16:59+00:00</updated>
<author>
<name>Gabor Juhos</name>
<email>juhosg@openwrt.org</email>
</author>
<published>2013-11-12T15:47:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=10473d0490a08cc1bc7748e710dc562a64206c30'/>
<id>10473d0490a08cc1bc7748e710dc562a64206c30</id>
<content type='text'>
The physical base address of the NOR flash is 0x1e000000
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc00000-0x1fffffff range.

Currently, U-Boot uses the mapped address to access the
flash, which does not work in recent qemu versions.

Since commit a427338b222b43197c2776cbc996936df0302f51
(mips_malta: correct reading MIPS revision at 0x1fc00010)
writing to the mapped address space causes a CPU exception.
Due to the exception, U-Boot hangs during boot when it tries
to detect the CFI flash chip.

Use the correct physical address for the MALTA_FLASH_BASE
constant to fix the problem. In order to avoid relocation
problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE
constants.

The change makes it possible to start U-Boot on a Malta
board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also
works on older versions (tested with 1.1.1, 1.2.2, 1.4.2,
1.5.3).

Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The physical base address of the NOR flash is 0x1e000000
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc00000-0x1fffffff range.

Currently, U-Boot uses the mapped address to access the
flash, which does not work in recent qemu versions.

Since commit a427338b222b43197c2776cbc996936df0302f51
(mips_malta: correct reading MIPS revision at 0x1fc00010)
writing to the mapped address space causes a CPU exception.
Due to the exception, U-Boot hangs during boot when it tries
to detect the CFI flash chip.

Use the correct physical address for the MALTA_FLASH_BASE
constant to fix the problem. In order to avoid relocation
problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE
constants.

The change makes it possible to start U-Boot on a Malta
board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also
works on older versions (tested with 1.1.1, 1.2.2, 1.4.2,
1.5.3).

Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>malta: arch/mips/include/asm/malta.h SPDX license tag</title>
<updated>2013-11-11T11:32:58+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-11T11:03:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a3e80904fb07cda792e636704e3b3950d1446af3'/>
<id>a3e80904fb07cda792e636704e3b3950d1446af3</id>
<content type='text'>
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent changes.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent changes.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>malta: setup PIIX4 interrupt route</title>
<updated>2013-11-09T16:21:02+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-08T11:18:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=81f98bbd62b66e4a590fe6fe9b0d8231e45beffd'/>
<id>81f98bbd62b66e4a590fe6fe9b0d8231e45beffd</id>
<content type='text'>
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.

This patch routes PIRQA &amp; PIRQB to IRQ 10, and PIRQC &amp; PIRQD to IRQ 11.
This matches the setup used by YAMON.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
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<pre>
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.

This patch routes PIRQA &amp; PIRQB to IRQ 10, and PIRQC &amp; PIRQD to IRQ 11.
This matches the setup used by YAMON.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>malta: display "U-boot" on the LCD screen</title>
<updated>2013-11-09T16:21:01+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-08T11:18:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e0ada6319bb3eb8bc1f97c00f05508ac0cfffc34'/>
<id>e0ada6319bb3eb8bc1f97c00f05508ac0cfffc34</id>
<content type='text'>
Displaying a message on the LCD screen is a simple yet effective way to
show the user that the board has booted successfully.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Displaying a message on the LCD screen is a simple yet effective way to
show the user that the board has booted successfully.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>malta: support for coreFPGA6 boards</title>
<updated>2013-11-09T16:21:01+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-08T11:18:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=baf37f06c5cc51d2b9d71a2c83d5d92de60203a9'/>
<id>baf37f06c5cc51d2b9d71a2c83d5d92de60203a9</id>
<content type='text'>
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 &amp; msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 &amp; msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips32: detect L1 cache sizes if they're not defined</title>
<updated>2013-11-09T16:21:01+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-08T11:18:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fa476f75bfff55772f0ebde3d5e02dc745e70f40'/>
<id>fa476f75bfff55772f0ebde3d5e02dc745e70f40</id>
<content type='text'>
For boards such as the MIPS Malta with an FPGA core card it is desirable
to be able to detect the L1 cache sizes at runtime, since they are not
dependant upon the board but on the FPGA bitstream in use. This patch
performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
not defined by the board configuration. In cases where the sizes are
detected this patch also removes the restriction that the I-cache &amp;
D-cache line sizes must be the same, as this is not necessarily true.

If the cache sizes are defined by a configuration then they will be
hardcoded as before, so this patch will not add overhead to such
boards.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
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<pre>
For boards such as the MIPS Malta with an FPGA core card it is desirable
to be able to detect the L1 cache sizes at runtime, since they are not
dependant upon the board but on the FPGA bitstream in use. This patch
performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
not defined by the board configuration. In cases where the sizes are
detected this patch also removes the restriction that the I-cache &amp;
D-cache line sizes must be the same, as this is not necessarily true.

If the cache sizes are defined by a configuration then they will be
hardcoded as before, so this patch will not add overhead to such
boards.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>include: delete include/linux/config.h</title>
<updated>2013-11-08T20:25:13+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-10-07T07:04:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=643aae1406c93ddc64fcf8c136b47cdffd9c8ccd'/>
<id>643aae1406c93ddc64fcf8c136b47cdffd9c8ccd</id>
<content type='text'>
Linux Kernel abolished include/linux/config.h long time ago.
(around version v2.6.18..v2.6.19)

We don't need to provide Linux copatibility any more.

This commit deletes include/linux/config.h
and fixes source files not to include this.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Linux Kernel abolished include/linux/config.h long time ago.
(around version v2.6.18..v2.6.19)

We don't need to provide Linux copatibility any more.

This commit deletes include/linux/config.h
and fixes source files not to include this.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cosmetic: remove empty lines at the top of file</title>
<updated>2013-11-08T14:41:37+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-11-05T02:28:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f0f75774e8bbe058fccd5b7c4fce6988c80c4e5'/>
<id>0f0f75774e8bbe058fccd5b7c4fce6988c80c4e5</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
<content type='xhtml'>
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<pre>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: bootm: add support for generic relocation of init ramdisks</title>
<updated>2013-08-13T09:58:48+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2013-05-09T15:10:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6c154552b0540f73cc2a3692f53b405f0f2bdf0e'/>
<id>6c154552b0540f73cc2a3692f53b405f0f2bdf0e</id>
<content type='text'>
All linux kernels after v2.6 require a page-aligned location of
an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to
support this with the generic U-Boot relocation code.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All linux kernels after v2.6 require a page-aligned location of
an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to
support this with the generic U-Boot relocation code.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
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