u-boot.git/arch/mips/include, branch v2020.10

mips: sync asm/mipsregs.h with Linux 5.7

2020-07-18T12:23:25+00:00

Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.

Signed-off-by: Daniel Schwierzeck 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese

mips: sync asm/addrspace.h with Linux 5.7

2020-07-18T12:23:25+00:00

Sync asm/addrspace.h with Linux 5.7

Signed-off-by: Daniel Schwierzeck 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese

mips: sync asm/asm.h with Linux 5.7

2020-07-18T12:23:25+00:00

Sync asm/asm.h with Linux 5.7.

Signed-off-by: Daniel Schwierzeck 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese

mips: remove deprecated UNCACHED_SDRAM() macro

2020-07-18T12:23:25+00:00

This macro only served as a wrapper for CKSEG1ADDR() with an
exception for CONFIG_TB0229. CONFIG_TB0229 doesn't exist, thus
use CKSEG1ADDR() directly.

This also prepares for an upcoming asm header sync with Linux.

Signed-off-by: Daniel Schwierzeck 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese

mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM

2020-07-18T12:23:25+00:00

This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.

Signed-off-by: Stefan Roese

mips: reloc: Change R_MIPS_NONE to catch pre-reloc BSS usage

2020-07-18T12:23:25+00:00

This patch changes the R_MIPS_NONE define from 0 to a magic value. This
makes it possible to better detect any forbidden pre-relocation usage
of BSS variables, as they are often zero'ed and then relocation is
stopped too early.

Additionally the error message is improved to also print the faulting
address. This helps finding the root-cause for this breakage by
comparing this address with the values in System.map.

This patch helps a lot when working on pre-relocation code, like the
Octeon DDR init code, where such variables have hit me multiple times
now.

Signed-off-by: Stefan Roese 
Cc: Daniel Schwierzeck 
Cc: Aaron Williams 
Cc: Chandrakala Chavva

mips: traps: Set WG bit in EBase register on Octeon

2020-07-18T12:23:25+00:00

WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
the exception base register.

Signed-off-by: Stefan Roese

common: Drop linux/bitops.h from common header

2020-05-19T01:19:23+00:00

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass

common: Drop net.h from common header

2020-05-18T21:33:31+00:00

Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass

mips: add a mtmips-specific field to architecture-specific global data

2020-04-27T18:29:33+00:00

SoCs of mtmips can use different CPU frequencies depending on the HW/SW
configurations. For example mt7628 uses 580MHz clock if the input xtal
frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot
the CPU uses the xtal frequency directly.

So hardcoding the timer frequency (half of the CPU frequency) in
CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case.

This patch adds a mtmips-specific field timer_freq to arch_global_data.
This field will be used later in mtmips-specific get_tbclk() to provide
accurate timer frequency in different boot stage.

Reviewed-by: Stefan Roese 
Reviewed-by: Daniel Schwierzeck 
Signed-off-by: Weijie Gao