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<title>u-boot.git/arch/mips/include, branch v2024.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2023-10-24T20:34:45Z</updated>
<entry>
<title>mips: Remove common.h usage</title>
<updated>2023-10-24T20:34:45Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-10-12T23:03:58Z</published>
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<id>urn:sha1:8991fed97dbd5fe79354b533b32c78742a126d02</id>
<content type='text'>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>mips: use asm-generic/unaligned.h</title>
<updated>2023-05-31T18:05:34Z</updated>
<author>
<name>Jens Wiklander</name>
<email>jens.wiklander@linaro.org</email>
</author>
<published>2023-05-22T12:22:33Z</published>
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<id>urn:sha1:f2c169af340aada15e904d33f834fcbf9bb5586e</id>
<content type='text'>
Mips essentially duplicates the content of asm-generic/unaligned.h, so use
that file directly instead.

Signed-off-by: Jens Wiklander &lt;jens.wiklander@linaro.org&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>Correct SPL use of MIPS_CM</title>
<updated>2023-02-10T12:41:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-05T22:40:15Z</published>
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<id>urn:sha1:a8673927910c6354477c4a9889dcba718f43b34a</id>
<content type='text'>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_MIPS_CM defined in Kconfig

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>mips: add support for noncached_alloc()</title>
<updated>2022-07-13T21:03:37Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-05-20T03:21:51Z</published>
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<id>urn:sha1:2948d9cf8637e49e2a172b8936a9f5a3a04bca13</id>
<content type='text'>
This patch adds support for noncached_alloc() which was only supported by
ARM platform.

Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG
is provided to access uncached memory. So most code of this patch is copied
from cache.c of ARM platform, with only two differences:
1. MMU is untouched in noncached_set_region()
2. Address returned by noncached_alloc() is converted using KSEG1ADDR()

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>mips: add more definitions for asm/cm.h</title>
<updated>2022-07-13T21:03:37Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-05-20T03:21:39Z</published>
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<id>urn:sha1:3a6cf2ded716122313e90436b0d9afaebae4e70d</id>
<content type='text'>
This patch add more definitions needed for MT7621 initialization.
MT7621 needs to initialize GIC/CPC and other related parts.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>mips: add asm/mipsmtregs.h for MIPS multi-threading</title>
<updated>2022-07-13T21:03:37Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-05-20T03:21:34Z</published>
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<id>urn:sha1:1cca8ba9ec34dcdf14c492b21a7366bba22617ec</id>
<content type='text'>
To be compatible with old u-boot used by lots of MT7621 devices, the u-boot
needs to boot-up MT7621's all cores, and all VPES of each core.

This patch adds asm/mipsmtregs.h from linux kernel which is need for
boot-up VPEs.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig</title>
<updated>2022-07-07T18:01:09Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-06-25T15:02:46Z</published>
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<id>urn:sha1:bb20a105e9fa475eb4258086cf59173540e7ff23</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SYS_BOOT_RAMDISK_HIGH

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>WS cleanup: remove SPACE(s) followed by TAB</title>
<updated>2021-09-30T13:08:16Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2021-09-27T15:42:39Z</published>
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<id>urn:sha1:0cf207ec01cbacae47585fcc26591dd2296507d6</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig</title>
<updated>2021-08-31T21:47:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-08-26T15:47:59Z</published>
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<id>urn:sha1:ab92b38a0161f0d8efa1c2112d944ef8f755dfbe</id>
<content type='text'>
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage.  For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol.  This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin &lt;alexey.brodkin@synopsys.com&gt;
Cc: Anup Patel &lt;anup.patel@wdc.com&gt;
Cc: Atish Patra &lt;atish.patra@wdc.com&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Leo &lt;ycliang@andestech.com&gt;
Cc: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: Sean Anderson &lt;seanga2@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mips-pull-2021-04-24' of https://source.denx.de/u-boot/custodians/u-boot-mips</title>
<updated>2021-04-24T23:39:14Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-04-24T23:39:14Z</published>
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<id>urn:sha1:4dda435131251a94b29afd52f010cf1ec5a7ceb2</id>
<content type='text'>
- MIPS: octeon: fix minor bugs of initial merge
- MIPS: octeon: add support for QLM and PCI-E controller
- MIPS: octeon: add support for AHCI and SATA
- MIPS: octeon: add E1000 ethernet support
- MIPS: octeon: add Octeon III NIC23 board
- ata/scsi: add support for Big Endian platforms
</content>
</entry>
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