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<title>u-boot.git/arch/mips/lib/cache.c, branch v2020.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>mips: cache: Make invalidate_dcache_range() weak to enable overwrite</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-06-30T10:33:19+00:00</published>
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<id>60a0559b7fe9bdb9433dc39c42e3e12c4363d63e</id>
<content type='text'>
This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>mips: cache: Make flush_cache() weak to enable overwrite</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-05-14T09:59:04+00:00</published>
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<id>1d4ba15c6fe1265c5964cce3436fd501b14bae3b</id>
<content type='text'>
This patch adds __weak to flush_cache() in lib/cache.c. This makes it
possible to overwrite this function by a platforms specific version,
like done with the Octeon base port.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
This patch adds __weak to flush_cache() in lib/cache.c. This makes it
possible to overwrite this function by a platforms specific version,
like done with the Octeon base port.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-05-14T09:59:03+00:00</published>
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<id>2eed3dca229e97aa03954ee5178457c4f2f8cfdb</id>
<content type='text'>
This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>common: Drop linux/bug.h from common header</title>
<updated>2020-05-19T01:19:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-05-10T17:40:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eb41d8a1befc45a30ccdab68fa3e099528486ffe'/>
<id>eb41d8a1befc45a30ccdab68fa3e099528486ffe</id>
<content type='text'>
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>common: Drop net.h from common header</title>
<updated>2020-05-18T21:33:31+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-05-10T17:39:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=90526e9fbac47af16d70f323feae45d8d1b0f9b7'/>
<id>90526e9fbac47af16d70f323feae45d8d1b0f9b7</id>
<content type='text'>
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: allow override of flush_dcache_range()</title>
<updated>2020-04-09T16:55:59+00:00</updated>
<author>
<name>Alex Nemirovsky</name>
<email>Alex.Nemirovsky@cortina-access.com</email>
</author>
<published>2019-12-23T20:19:20+00:00</published>
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<id>ebdc27895492e740d96c67d624821cfeb56c7544</id>
<content type='text'>
Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.

Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
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<pre>
Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.

Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>common: Move some cache and MMU functions out of common.h</title>
<updated>2019-12-02T23:23:55+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-11-14T19:57:37+00:00</published>
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<id>9edefc27760b00309d482d94fdc23bf5d2ea2c42</id>
<content type='text'>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: add compile time definition of L2 cache size</title>
<updated>2019-10-25T15:20:43+00:00</updated>
<author>
<name>Ramon Fried</name>
<email>rfried.dev@gmail.com</email>
</author>
<published>2019-06-10T18:05:26+00:00</published>
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<id>22247c63ac4ebed8bbaafe1e717c1de7600a0883</id>
<content type='text'>
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
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<pre>
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: cache: reimplement dcache_[status, enable, disable]</title>
<updated>2018-09-22T19:02:03+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2018-09-07T17:02:03+00:00</published>
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<id>2f85c2be21dfee1e8ac1f8fb9759be7108233e85</id>
<content type='text'>
Those functions are not needed during cache init and can be
implemented in C. Only support the safe disabling of caches when
this is required for booting an OS. Reenabling caches is much
harder to implement if an optional coherency manager must be
supported. As there is no real use-case anyway, dcache_enable
is implemented with an error message.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
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<pre>
Those functions are not needed during cache init and can be
implemented in C. Only support the safe disabling of caches when
this is required for booting an OS. Reenabling caches is much
harder to implement if an optional coherency manager must be
supported. As there is no real use-case anyway, dcache_enable
is implemented with an error message.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06+00:00</published>
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<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
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