u-boot.git/arch/mips/lib, branch v2020.01

common: Move trap_init() out of common.h

2019-12-02T23:25:25+00:00

Move this function into the init.h header file.

Signed-off-by: Simon Glass 
Reviewed-by: Tom Rini 
Reviewed-by: Daniel Schwierzeck

common: Move ARM cache operations out of common.h

2019-12-02T23:24:58+00:00

These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass 
Reviewed-by: Daniel Schwierzeck 
Reviewed-by: Tom Rini

common: Move some cache and MMU functions out of common.h

2019-12-02T23:23:55+00:00

These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass 
Reviewed-by: Tom Rini

MIPS: add compile time definition of L2 cache size

2019-10-25T15:20:43+00:00

If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried

env: Move env_init() to env.h

2019-08-11T20:43:41+00:00

Move env_init() over to the new header file.

Signed-off-by: Simon Glass 
Acked-by: Joe Hershberger

arch: mips: Update initrd_start and initrd_end

2019-05-03T14:42:23+00:00

Microsemi SoC defines CONFIG_SYS_SDRAM_BASE to be 0x80000000, which
represents the start of kseg0 and represents a virtual address. Meaning
that the initrd_start and initrd_end point somewhere kseg0.
When these parameters are passed to linux kernel through DT
they are pointing somewhere in kseg0 which is a virtual address but linux
kernel expects the addresses to be physical addresses(in kuseg) because
it is converting the physical address to a virtual one.

Therefore update the uboot to pass the physical address of initrd_start
and initrd_end by converting them using the function virt_to_phys before
setting up the DT.

Signed-off-by: Horatiu Vultur 
Reviewed-by: Daniel Schwierzeck

bootm: mips: Remove boot_reloc_ramdisk

2019-04-12T15:32:50+00:00

Remove the function boot_reloc_ramdisk in the file arch/mips/lib/bootm
because it is relocating again the ramdisk. The function do_bootm_states()
already relocates the ramdisk even if it is a legacy uImage or a FIT image.

The relocation in the function do_bootm_states() was introduce in the
commit c2e7e72bb9f0cb47d024997b381cb64786eb5402 ("bootm: relocate ramdisk
if CONFIG_SYS_BOOT_RAMDISK_HIGH set")

Signed-off-by: Horatiu Vultur 
Reviewed-by: Daniel Schwierzeck

MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODE

2018-09-22T19:04:10+00:00

Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT
(or CONF_CM_CACHABLE_COW when a CM is available). There is no
need to make this configurable.

Signed-off-by: Daniel Schwierzeck

MIPS: cache: make index base address configurable

2018-09-22T19:02:03+00:00

The index base address used for the cache initialisation is currently
hard-coded to CKSEG0. Make this value configurable if a MIPS system
needs to have a different address (e.g. in SRAM or ScratchPad RAM).

Signed-off-by: Daniel Schwierzeck

MIPS: cache: optimise changing of k0 CCA mode

2018-09-22T19:02:03+00:00

Changing the Cache Coherency Algorithm (CCA) for kernel mode
requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1
before changing the CCA mode. Jump back to KSEG0 afterwards.

Signed-off-by: Daniel Schwierzeck