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<title>u-boot.git/arch/mips/lib, branch v2020.07-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/mips/lib?h=v2020.07-rc2</id>
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<updated>2020-04-27T18:29:33Z</updated>
<entry>
<title>mips: spl: Flush cache before jumping to U-Boot proper</title>
<updated>2020-04-27T18:29:33Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-04-21T07:28:46Z</published>
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<id>urn:sha1:2a9d68e41f6d67432c19dc1d140f908df0401f2c</id>
<content type='text'>
This patch adds a MIPS specific jump_to_image_no_args() implementation,
which flushes the U-Boot proper image loaded from the boot device in
SPL before jumping to it.

It has been noticed on MT76x8, that this cache flush is needed. Other
MIPS platforms might need it as well.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>mips: add support to restore exception vector base before booting linux</title>
<updated>2020-04-27T18:29:33Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-04-21T07:28:25Z</published>
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<id>urn:sha1:71059736b854462a474bc329a366c3392cf92462</id>
<content type='text'>
In U-Boot the exception vector base will be moved to top of memory, to be
used to display register dump when exception occurs.

But some old linux kernel does not honor the base set in CP0_EBASE. A
modified exception vector base will cause kernel crash.

This patch adds an option to enable reset exception vector base to its
previous value, or a user configured value before booting linux kernel.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>mips: cmd: go: Flush cache before jumping to app/image</title>
<updated>2020-04-09T17:00:00Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-02-13T06:04:00Z</published>
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<id>urn:sha1:fb9acad30562177287d8cffec19e5dfa6f072de7</id>
<content type='text'>
It has been noticed on MT7628/88 platforms, that booting the RAM image
does not work reliably. Sometimes it works and sometimes not. Debugging
showed that this "might" be a cache related issue as very strange
errors occurred (e.g. output corrupted etc).

This patch adds a cache flush for the complete SDRAM area to the go cmd
before jumping to the entry point for the MIPS architecture. The
complete area is flushed as we don't know at this point, how big the
area of the "application" really is.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Tested-by: Mauro Condarelli &lt;mc5686@mclink.it&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Mauro Condarelli &lt;mc5686@mclink.it&gt;
Cc: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>MIPS: allow override of flush_dcache_range()</title>
<updated>2020-04-09T16:55:59Z</updated>
<author>
<name>Alex Nemirovsky</name>
<email>Alex.Nemirovsky@cortina-access.com</email>
</author>
<published>2019-12-23T20:19:20Z</published>
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<id>urn:sha1:ebdc27895492e740d96c67d624821cfeb56c7544</id>
<content type='text'>
Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.

Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
</content>
</entry>
<entry>
<title>common: Move hang() to the same header as panic()</title>
<updated>2020-01-17T22:53:40Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-28T17:45:07Z</published>
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<id>urn:sha1:db41d65a97f335167e1fbc0400a83333b5157703</id>
<content type='text'>
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Migrate a few more files]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common: Move relocate_code() to init.h</title>
<updated>2020-01-17T18:26:49Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-28T17:44:45Z</published>
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<id>urn:sha1:941338725d339c233379def75adeaa0977587a96</id>
<content type='text'>
This is an init function so move it out of the common header. Avoid using
the typedef so that we don't have to include the global_data header file.

Also tidy up the function style in comments while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common: Move trap_init() out of common.h</title>
<updated>2019-12-02T23:25:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-11-14T19:57:48Z</published>
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<id>urn:sha1:d67bdaa7999944001391fc238f00dfbaf7e9929a</id>
<content type='text'>
Move this function into the init.h header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>common: Move ARM cache operations out of common.h</title>
<updated>2019-12-02T23:24:58Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-11-14T19:57:39Z</published>
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<id>urn:sha1:1eb69ae498567bb0b62ee554647204e8245cdacc</id>
<content type='text'>
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common: Move some cache and MMU functions out of common.h</title>
<updated>2019-12-02T23:23:55Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-11-14T19:57:37Z</published>
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<id>urn:sha1:9edefc27760b00309d482d94fdc23bf5d2ea2c42</id>
<content type='text'>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>MIPS: add compile time definition of L2 cache size</title>
<updated>2019-10-25T15:20:43Z</updated>
<author>
<name>Ramon Fried</name>
<email>rfried.dev@gmail.com</email>
</author>
<published>2019-06-10T18:05:26Z</published>
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<id>urn:sha1:22247c63ac4ebed8bbaafe1e717c1de7600a0883</id>
<content type='text'>
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
</content>
</entry>
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