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<title>u-boot.git/arch/mips/lib, branch v2023.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/mips/lib?h=v2023.01</id>
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<updated>2022-09-29T20:07:57Z</updated>
<entry>
<title>treewide: Drop bootm_headers_t typedef</title>
<updated>2022-09-29T20:07:57Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-09-07T02:26:50Z</published>
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<id>urn:sha1:d9d7c20b731788c5c8018ce8e5c6e86bb01413df</id>
<content type='text'>
This is not needed and we should avoid typedefs. Use the struct instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>mips: add support for noncached_alloc()</title>
<updated>2022-07-13T21:03:37Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-05-20T03:21:51Z</published>
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<id>urn:sha1:2948d9cf8637e49e2a172b8936a9f5a3a04bca13</id>
<content type='text'>
This patch adds support for noncached_alloc() which was only supported by
ARM platform.

Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG
is provided to access uncached memory. So most code of this patch is copied
from cache.c of ARM platform, with only two differences:
1. MMU is untouched in noncached_set_region()
2. Address returned by noncached_alloc() is converted using KSEG1ADDR()

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>mips: Avoid using config_enabled() directly</title>
<updated>2022-02-09T04:07:59Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-01-22T12:07:23Z</published>
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<id>urn:sha1:d67f9e35c4573fd6389d41a7dfdfaf1e6a155005</id>
<content type='text'>
Use IS_ENABLED() instead, which is the correct macro for checking a CONFIG
option.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>lmb: Switch to generic arch_lmb_reserve_generic()</title>
<updated>2021-09-23T18:15:32Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@gmail.com</email>
</author>
<published>2021-09-10T20:47:10Z</published>
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<id>urn:sha1:1f391c34547e79391ad4b167d68351521c49c6d0</id>
<content type='text'>
Switch arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() to
arch_lmb_reserve_generic().

Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Alexey Brodkin &lt;alexey.brodkin@synopsys.com&gt;
Cc: Angelo Dureghello &lt;angelo@sysam.it&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;
Cc: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Cc: Michal Simek &lt;monstr@monstr.eu&gt;
Cc: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>common: Drop asm/global_data.h from common header</title>
<updated>2021-02-02T20:33:42Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-10-31T03:38:53Z</published>
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<id>urn:sha1:401d1c4f5d2d29c4bc4beaec95402ca23eb63295</id>
<content type='text'>
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include &lt;asm/global_data.h&gt; at all, so
remove that include.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common: board_r: Drop arch-specific ifdefs around initr_trap</title>
<updated>2021-01-15T19:36:12Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait@windriver.com</email>
</author>
<published>2020-11-28T08:43:18Z</published>
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<id>urn:sha1:130845bac11ecd542587b2d2ce2b2fe87f112f1d</id>
<content type='text'>
In order to remove the arch-specific ifdefs around initr_trap, introduce
arch_initr_trap weak initcall. Implementations for ppc/m68k/mips have
been moved to arch/&lt;arch&gt;/lib/traps.c

Default implementation is a nop stub.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait@windriver.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>global: Move from bi_memstart/memsize -&gt; gd-&gt;ram_base/ram_size</title>
<updated>2020-08-26T07:19:34Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-08-12T11:16:36Z</published>
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<id>urn:sha1:e207f2256f1fc3d0616608ab75e7dace15b0f9e6</id>
<content type='text'>
With the planned removal of bi_memstart &amp; bi_memsize, this patch now
moves the references to the better suiting gd-&gt;ram_base/ram_size
variables.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>mips: sync asm/mipsregs.h with Linux 5.7</title>
<updated>2020-07-18T12:23:25Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T23:46:18Z</published>
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<id>urn:sha1:81d4b14f7e7e4492d99af96c42be7fd8b26eb4d7</id>
<content type='text'>
Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>mips: remove deprecated UNCACHED_SDRAM() macro</title>
<updated>2020-07-18T12:23:25Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T23:46:15Z</published>
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<id>urn:sha1:dd1bb42305033b77032099ce03cbed6bdbb74612</id>
<content type='text'>
This macro only served as a wrapper for CKSEG1ADDR() with an
exception for CONFIG_TB0229. CONFIG_TB0229 doesn't exist, thus
use CKSEG1ADDR() directly.

This also prepares for an upcoming asm header sync with Linux.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>mips: refactor disabling of caches</title>
<updated>2020-07-18T12:23:25Z</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T22:45:56Z</published>
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<id>urn:sha1:60772433dd42987f3b965188d9577150084b8956</id>
<content type='text'>
Logically this code belongs to cache_init.S.

If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
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