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<title>u-boot.git/arch/mips/mach-mscc/reset.c, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/mips/mach-mscc/reset.c?h=main</id>
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<updated>2023-10-24T20:34:45Z</updated>
<entry>
<title>mips: Remove common.h usage</title>
<updated>2023-10-24T20:34:45Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-10-12T23:03:58Z</published>
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<id>urn:sha1:8991fed97dbd5fe79354b533b32c78742a126d02</id>
<content type='text'>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>mips: mscc: serval: Fix reset</title>
<updated>2019-05-03T14:42:23Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-04-15T09:56:36Z</published>
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<id>urn:sha1:72e224b864baa4905b9c5997223baa3e65725be7</id>
<content type='text'>
In case the ddr training was failing, it couldn't reset, it was just
hanging. Therefore reimplement it, so when ddr training is failing
it would call _machine_restart, which power downs the DDR and does
a force reset.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>MSCC: Add support for Serval SoC family.</title>
<updated>2019-01-23T17:28:09Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-23T15:39:42Z</published>
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<id>urn:sha1:1895b87e84d75272218a7db1d3454265fcf6e791</id>
<content type='text'>
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are
found in Microsemi Switches solution.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>MSCC: Add support for Servalt SoC family.</title>
<updated>2019-01-23T17:27:26Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-17T14:33:27Z</published>
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<id>urn:sha1:055125171a39aecd5814bfb0c39233699338b647</id>
<content type='text'>
As Ocelot, Luton and Jaguar2, this family of SoCs are found
in Microsemi Switches solution.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>MSCC: Add support for Jaguar2 SOC family</title>
<updated>2019-01-16T12:56:43Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-12T17:56:56Z</published>
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<id>urn:sha1:e7a0de2c317e75accfa53c2dd17f521462ccd830</id>
<content type='text'>
As the Ocelot and Luton SoCs, this family of SoCs are found
in Microsemi Switches solution.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>MSCC: add support for Ocelot SoCs</title>
<updated>2018-12-19T14:23:01Z</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@bootlin.com</email>
</author>
<published>2018-12-14T15:16:47Z</published>
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<id>urn:sha1:dd1033e4e0254bd2d19debe433921d9a71bdf674</id>
<content type='text'>
This family of SoCs are found in the Microsemi Switches solution and have
already a support in the linux kernel.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
</content>
</entry>
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