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<title>u-boot.git/arch/mips/mach-mtmips/include, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>mips: mtmips: add support for MediaTek MT7620 SoC</title>
<updated>2021-01-24T20:39:26+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-11-12T08:35:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dd4fdc0b1471772b8b4f51671b251dcf69fdd99a'/>
<id>dd4fdc0b1471772b8b4f51671b251dcf69fdd99a</id>
<content type='text'>
This patch adds support for MediaTek MT7620 SoC.
All files are dedicated for u-boot.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
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<pre>
This patch adds support for MediaTek MT7620 SoC.
All files are dedicated for u-boot.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mips: mtmips: add support to initialize SDRAM</title>
<updated>2021-01-24T20:39:26+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-11-12T08:35:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f0a865bd5579510a1fe287c1f274635f3cc0791d'/>
<id>f0a865bd5579510a1fe287c1f274635f3cc0791d</id>
<content type='text'>
This patch adds support for mtmips SoCs to initialize the SDRAM.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
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<pre>
This patch adds support for mtmips SoCs to initialize the SDRAM.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: mtmips: add SPL support</title>
<updated>2020-04-27T18:30:12+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-04-21T07:28:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a4b6964b54d5067181db803f68c7472a9d07efa'/>
<id>7a4b6964b54d5067181db803f68c7472a9d07efa</id>
<content type='text'>
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (&lt; 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (&lt; 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: mtmips: rewrite lowlevel codes of mt7628</title>
<updated>2020-04-27T18:29:33+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-04-21T07:28:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=02cd449f0b03a3015577b42fbb4db88606c76c03'/>
<id>02cd449f0b03a3015577b42fbb4db88606c76c03</id>
<content type='text'>
This patch rewrites the mtmips architecture with the following changes:

1. Move MT7628 soc parts into a subfolder.
2. Lock parts of D-Cache as temporary stack.
3. Reimplement DDR initialization in C language.
4. Reimplement DDR calibration in a clear logic.
5. Add full support for auto size detection for DDR1 and DDR2.
6. Use accurate CPU clock depending on the input xtal frequency for timer
   and delay functions.

Note:

print_cpuinfo() has incompatible parts with MT7620 so it's moved into
mt7628 subfolder.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch rewrites the mtmips architecture with the following changes:

1. Move MT7628 soc parts into a subfolder.
2. Lock parts of D-Cache as temporary stack.
3. Reimplement DDR initialization in C language.
4. Reimplement DDR calibration in a clear logic.
5. Add full support for auto size detection for DDR1 and DDR2.
6. Use accurate CPU clock depending on the input xtal frequency for timer
   and delay functions.

Note:

print_cpuinfo() has incompatible parts with MT7620 so it's moved into
mt7628 subfolder.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
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</content>
</entry>
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