u-boot.git/arch/mips, branch v2015.04

generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig

2015-03-28T13:03:08+00:00

Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada 
Reviewed-by: Simon Glass 
Reviewed-by: Alexey Brodkin

MIPS: unify CPU code in arch/mips/cpu/

2015-01-30T13:19:58+00:00

Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.

Signed-off-by: Paul Burton 
Signed-off-by: Daniel Schwierzeck

MIPS: move au1x00 SoC code to arch/mips/mach-au1x00

2015-01-30T13:19:58+00:00

Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.

Signed-off-by: Daniel Schwierzeck 
Cc: Paul Burton

MIPS: handle mips64 ST0_KX bit in mips32 start.S

2015-01-30T13:19:58+00:00

In preparation for sharing a single copy of start.S between mips32 &
mips64, handle setting the KX bit of the cop0 Status register when the
mips32 start.S is built for mips64.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: handle mips64 relocs in mips32 start.S

2015-01-30T13:19:58+00:00

In preparation for sharing a single copy of start.S between mips32 &
mips64, handle mips64 relocations in the mips32 start.S when built for
mips64.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: use asm.h macros in mips32 start.S

2015-01-30T13:19:57+00:00

Where the mips32 & mips64 implementations of start.S differ in terms of
access sizes & offsets, use the appropriate macros from asm.h to
abstract those differences away. This is in preparation for sharing a
single copy of start.S between mips32 & mips64.

The exception to this is loads of immediates to be written to the cop0
Config register, which is a 32bit register on mips64 and therefore
constants written to it can be loaded as such.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

malta: IDE support

2015-01-29T12:11:02+00:00

This patch adds IDE support to the MIPS Malta board. The IDE controller
is enabled after probing the PCI bus and otherwise just makes use of
U-boot generic IDE support.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: clear TagLo select 2 during cache init

2015-01-29T11:55:01+00:00

Current MIPS cores from Imagination Technologies use TagLo select 2 for
the data cache. The architecture requires that it is safe for software
to write to this register even if it isn't present, so take the trivial
option of clearing both selects 0 & 2.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: allow systems to skip loads during cache init

2015-01-29T11:55:01+00:00

Current MIPS systems do not require that loads be performed to force the
parity of cache lines, a simple invalidate by clearing the tag for each
line will suffice. Thus this patch makes the loads & subsequent second
invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
option, and defines that for existing mips32 targets. Exceptions are
malta where this is known to be unnecessary, and qemu-mips where caches
are not implemented.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

MIPS: inline mips_init_[id]cache functions

2015-01-29T11:55:01+00:00

The mips_init_[id]cache functions are small & only called once from a
single callsite. Inlining them allows mips_cache_reset to avoid having
to bother moving arguments around & leaves it a leaf function which is
thus able to simply keep the return address live in the ra register
throughout, simplifying the code.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck