u-boot.git/arch/mips, branch v2016.03-rc2

Use correct spelling of "U-Boot"

2016-02-06T11:00:59Z

Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng Reviewed-by: Heiko Schocher Reviewed-by: Simon Glass Reviewed-by: Minkyu Kang

board: Enable ethernet, tftpboot support to pic32mzdask board.

2016-02-01T21:14:02Z

This adds ethernet, TFTP support for PIC32MZ[DA] Starter Kit. Also custom environment variables/scripts are added to help boot from network. Signed-off-by: Purna Chandra Mandal

board: add SDHCI support for PIC32MZDASK board.

2016-02-01T21:14:02Z

Enable MMC, SDHCI, FAT_FS support for PIC32MZ[DA] StarterKit. Also add custom scripts, rules to boot Linux from microSD card. Signed-off-by: Purna Chandra Mandal

board: Add Microchip PIC32MZ[DA]-Starter-Kit board.

2016-02-01T21:14:01Z

This adds support for Microchip PIC32MZ[DA] StarterKit board based on a PIC32MZ[DA] family of microcontroller. Signed-off-by: Purna Chandra Mandal Reviewed-by: Daniel Schwierzeck

MIPS: Add support for Microchip PIC32MZ[DA] SoC family.

2016-02-01T21:14:01Z

Add Microchip PIC32MZ[DA] SoC family support. Signed-off-by: Purna Chandra Mandal Reviewed-by: Daniel Schwierzeck

drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.

2016-02-01T21:14:01Z

This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module. DDR2 controller operates in half-rate mode (upto 533MHZ frequency). Signed-off-by: Paul Thacker Signed-off-by: Purna Chandra Mandal Reviewed-by: Daniel Schwierzeck Reviewed-by: Tom Rini Reviewed-by: Simon Glass

MIPS: initial infrastructure for Microchip PIC32 architecture

2016-02-01T21:14:00Z

Create initial directory, Kconfigs needed for PIC32 architecture support. Also add PIC32 specific register definition required for drivers. Signed-off-by: Purna Chandra Mandal Reviewed-by: Daniel Schwierzeck Reviewed-by: Tom Rini

MIPS: Support dynamic I/O port base address

2016-02-01T21:13:25Z

The existing mips_io_port_base variable isn't suitable for use early during boot since it will be stored in the .data section which may not be writable pre-relocation. Fix this by moving the I/O port base address into struct arch_global_data. In order to avoid adding this field for all targets, make this dependant upon a new Kconfig entry CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a non-zero I/O port base, so select this option only for Malta. Signed-off-by: Paul Burton

MIPS: Remove SLOW_DOWN_IO

2016-02-01T21:13:25Z

CONF_SLOWDOWN_IO is never set for any target, so remove the dead code in the SLOW_DOWN_IO macro. This is done in preparation for changes to mips_io_port_base which can be avoided in this path by removing it entirely. Signed-off-by: Paul Burton

mips: cache: Bulletproof the code against cornercases

2016-02-01T21:13:24Z

This patch makes sure that the flush/invalidate_dcache_range() functions can handle corner-case calls like this -- invalidate_dcache_range(0, 0, 0); This call is valid and is happily produced by USB EHCI code for example. The expected behavior of the cache function(s) in this case is that they will do no operation, since the size is zero. The current implementation though has a problem where such invocation will result in a hard CPU hang. This is because under such conditions, where the start_addr = 0 and stop = 0, the addr = 0 and aend = 0xffffffe0 . The loop will then try to iterate over the entire address space, which in itself is wrong. But iterating over the entire address space might also hit some odd address which will cause bus hang. The later happens on the Atheros MIPS. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Hans de Goede