u-boot.git/arch/mips, branch v2018.01

MIPS: Break out of cache loops for unimplemented caches

2017-11-28T20:59:30+00:00

If we run on a CPU which doesn't implement a particular cache then we
would previously get stuck in an infinite loop, executing a cache op on
the first "line" of the missing cache & then incrementing the address by
0. This was being avoided for the L2 caches, but not for the L1s. Fix
this by generalising the check for a zero line size & avoiding the cache
op loop when this is the case.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck 
Cc: u-boot@lists.denx.de

MIPS: Clear instruction hazards in flush_cache()

2017-11-28T20:59:30+00:00

When writing code, for example during relocation, we ensure that the
icache has a coherent view of the new instructions with a call to
flush_cache(). This handles the bulk of the work to ensure the new
instructions will execute as expected, however it does not ensure that
the CPU pipeline doesn't already contain instructions taken from a stale
view of the affected memory. This could theoretically be a problem for
relocation, but in practice typically isn't because we sync caches for
enough code after the entry point of the newly written code that by the
time the CPU pipeline might possibly fetch any of it we'll have long ago
written it back & invalidated any stale icache entries. This is however
a problem for shorter regions of code.

In preparation for later patches which write shorter segments of code,
ensure any instruction hazards are cleared by flush_cache() by
introducing & using a new instruction_hazard_barrier() function which
makes use of the jr.hb instruction to clear the hazard.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck 
Cc: u-boot@lists.denx.de

MIPS: Ensure cache ops complete in cache maintenance functions

2017-11-28T20:59:30+00:00

A typical use of cache maintenance functions is to force writeback of
data which a device is about to read using DMA - for example a
descriptor or command structure. Such users of cache maintenance
functions require that operations on the cache have completed before
they proceed to instruct a device to read memory. This requires that we
place a completion barrier (ie. sync instruction) between the cache ops
and whatever write informs the device to perform DMA.

Whilst strictly speaking this isn't all users of the cache maintenance
functions & we could instead place the barriers in the drivers that
require them, it would be much more invasive to do so than to just have
the barrier be the default by placing it in the cache functions
themselves. The cost is low enough that it shouldn't matter to us in any
rare cases that we use the cache functions when not performing DMA.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck 
Cc: u-boot@lists.denx.de

MIPS: Drop unused PTR_COUNT_SHIFT from u-boot.lds

2017-11-28T20:59:30+00:00

The u-boot.lds linker script for MIPS defines a PTR_COUNT_SHIFT macro to
2 or 3 for 32 bit or 64 bit builds respectively. This macro is never
actually used though, so remove the dead code.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck

mips: Use asm-generic/io.h

2017-10-03T01:52:23+00:00

Convert the mips architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As mips actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck 
Reviewed-by: Daniel Schwierzeck 
Acked-by: Daniel Schwierzeck

env: Rename getenv/_f() to env_get()

2017-08-16T12:30:24+00:00

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk 
Signed-off-by: Simon Glass

env: Convert CONFIG_ENV_IS_IN... to a choice

2017-08-16T00:50:01+00:00

At present we support multiple environment drivers but there is not way to
select between them at run time. Also settings related to the position and
size of the environment area are global (i.e. apply to all locations).

Until these limitations are removed we cannot really support more than one
environment location. Adjust the location to be a choice so that only one
can be selected. By default the environment is 'nowhere', meaning that the
environment exists only in memory and cannot be saved.

Also expand the help for the 'nowhere' option and move it to the top since
it is the default.

Signed-off-by: Simon Glass 
[trini: Move all of the imply logic to default X if Y so it works again]
Signed-off-by: Tom Rini

mips: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-Boot

2017-07-27T12:59:03+00:00

Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.

Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.

Signed-off-by: Andy Yan 
Acked-by: Daniel Schwierzeck 
Acked-by: Philipp Tomsich 
Reviewed-by: Philipp Tomsich 
[fixed up commit-message:]
Signed-off-by: Philipp Tomsich

Merge git://git.denx.de/u-boot-mips

2017-07-26T15:29:20+00:00

Convert CONFIG_ENV_IS_IN_FLASH to Kconfig

2017-07-26T01:20:02+00:00

This converts the following to Kconfig:
   CONFIG_ENV_IS_IN_FLASH

Signed-off-by: Simon Glass