u-boot.git/arch/mips, branch v2019.01 Unnamed repository; edit this file 'description' to name the repository. mips: jz47xx: Add Creator CI20 platform 2018-12-19T14:23:02+00:00 Paul Burton paul.burton@imgtec.com 2018-12-16T22:25:23+00:00 25c7de2255128743fcbe436b6f3b17a70d0cdd82 Add support for the Creator CI20 platform based on the JZ4780 SoC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de> 
Add support for the Creator CI20 platform based on the JZ4780 SoC.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
mips: jz47xx: Add JZ4780 SoC support 2018-12-19T14:23:01+00:00 Paul Burton paul.burton@imgtec.com 2018-12-16T22:25:22+00:00 cd71b1d5d26dfff15222f5df8a5a6df68fc41df7 Add initial support for the Ingenic JZ47xx MIPS SoC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de> 
Add initial support for the Ingenic JZ47xx MIPS SoC.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
mips: Add SPL header 2018-12-19T14:23:01+00:00 Paul Burton paul.burton@imgtec.com 2018-12-16T22:25:21+00:00 b325c4dcd72246a107580280ff66f4c86b23254a Add header with SPL boot mode and type definitions. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> 
Add header with SPL boot mode and type definitions.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
MSCC: add board support for the Luton based evaluation board 2018-12-19T14:23:01+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2018-12-14T15:16:50+00:00 f8c8cedd7ad377cb2a00d35d94dec0dd260117cc Adding the support for the Luton boards PCB91 which share common code with the Ocelots boards, including board code, device tree and configuration. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 
Adding the support for the Luton boards PCB91 which share common code with
the Ocelots boards, including board code, device tree and configuration.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
MSCC: add board support for the Ocelots based evaluation boards 2018-12-19T14:23:01+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2018-12-14T15:16:49+00:00 6787c1ece07f771629ea5b463a362f9b4c40d2c0 Adding the support for 2 boards sharing common code for Ocelot chip: PCB120 and PCB123 Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 
Adding the support for 2 boards sharing common code for Ocelot chip:
PCB120 and PCB123

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
MSCC: add support for Luton SoCs 2018-12-19T14:23:01+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2018-12-14T15:16:48+00:00 6bd8231a6dd58c2003e67a84e55705014d963989 As the Ocelots SoCs, this family of SoCs are found in the Microsemi Switches solution. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 
As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
MSCC: add support for Ocelot SoCs 2018-12-19T14:23:01+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2018-12-14T15:16:47+00:00 dd1033e4e0254bd2d19debe433921d9a71bdf674 This family of SoCs are found in the Microsemi Switches solution and have already a support in the linux kernel. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 
This family of SoCs are found in the Microsemi Switches solution and have
already a support in the linux kernel.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
MIPS: Allow to prefetch and lock instructions into cache 2018-12-19T14:23:01+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2018-12-14T15:16:46+00:00 464b96bb8094a359f7b27027319eda64a961c5af This path add a new helper allowing to prefetch and lock instructions into cache. This is useful very early in the boot when no RAM is available yet. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 
This path add a new helper allowing to prefetch and lock instructions
into cache. This is useful very early in the boot when no RAM is
available yet.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
MIPS: move create_tlb() in an proper header: mipsregs.h 2018-12-19T14:23:01+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2018-12-14T15:16:45+00:00 48ee7b68533b7f007c337d9a606eb52c975445ad Export create_tlb() as an inline function in mipsregs.h. It allows to remove the declaration of the function from the board files. Then it will allow also to use this function very early in the boot when the stack is not usable. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 
Export create_tlb() as an inline function in mipsregs.h. It allows to
remove the declaration of the function from the board files.

Then it will allow also to use this function very early in the boot when
the stack is not usable.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
MIPS: remove local_irq_[save|restore] from CP0 macros 2018-12-19T14:23:01+00:00 Daniel Schwierzeck daniel.schwierzeck@gmail.com 2018-12-19T14:18:52+00:00 a0abb52c5a5b1de522380984bb9429ee973b1f8e With moving write_on_tlb() to arch/mips/include/asm/mipsregs.h there are now compiler warnings when some generic code includes asm/io.h. This happens for example when enabling OF live tree. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 
With moving write_on_tlb() to arch/mips/include/asm/mipsregs.h
there are now compiler warnings when some generic code includes
asm/io.h. This happens for example when enabling OF live tree.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>