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<title>u-boot.git/arch/mips, branch v2019.07-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/mips?h=v2019.07-rc2</id>
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<updated>2019-05-03T14:46:36Z</updated>
<entry>
<title>net: mscc: ocelot: Update DTS for Luton pcb90</title>
<updated>2019-05-03T14:46:36Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-05-01T11:17:00Z</published>
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<id>urn:sha1:5c629b1b69f780540e6e3bcc57d29438749f97c5</id>
<content type='text'>
Update device tree for luton to add support for luton pcb90.
This pcb has 24 ports from which 12 ports are connected to
SerDes6G.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>mips: rename mach-mt7620 to mach-mtmips</title>
<updated>2019-05-03T14:43:11Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2019-04-30T03:13:58Z</published>
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<id>urn:sha1:16b94903e2462a8983322bbc865c0617b9e02b79</id>
<content type='text'>
Currently mach-mt7620 contains only support for mt7628. To avoid confusion,
rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms.
MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628
because they do not share the same lowlevel codes.

Dependencies of four drivers are changed to SOC_MT7628 as these drivers
are only used by MT7628.

Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: Update DTS for Ocelot pcb120.</title>
<updated>2019-05-03T14:42:24Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-04-24T09:27:59Z</published>
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<id>urn:sha1:8c211af8f8c0617c40ccf4f0df557e4fbf6073ea</id>
<content type='text'>
Update device tree for ocelot to add support for ocelot pcb120.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: Update network driver for pcb120</title>
<updated>2019-05-03T14:42:23Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-04-24T09:27:57Z</published>
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<id>urn:sha1:6390da4a5770e59ac220c1b0412a66d2c861a547</id>
<content type='text'>
Update Ocelot network driver to have support also for pcb120.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>arch: mips: Update initrd_start and initrd_end</title>
<updated>2019-05-03T14:42:23Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-04-24T15:21:29Z</published>
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<id>urn:sha1:6943cc9732202b9c65990cff9f74cea6b8173e09</id>
<content type='text'>
Microsemi SoC defines CONFIG_SYS_SDRAM_BASE to be 0x80000000, which
represents the start of kseg0 and represents a virtual address. Meaning
that the initrd_start and initrd_end point somewhere kseg0.
When these parameters are passed to linux kernel through DT
they are pointing somewhere in kseg0 which is a virtual address but linux
kernel expects the addresses to be physical addresses(in kuseg) because
it is converting the physical address to a virtual one.

Therefore update the uboot to pass the physical address of initrd_start
and initrd_end by converting them using the function virt_to_phys before
setting up the DT.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>MSCC: delete obsolete reference to MSCC_BITBANG_SPI_GPIO</title>
<updated>2019-05-03T14:42:23Z</updated>
<author>
<name>Robert P. J. Day</name>
<email>rpjday@crashcourse.ca</email>
</author>
<published>2019-04-17T20:13:45Z</published>
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<id>urn:sha1:feda3b44a999f25bcadaa8b345c740ea05c0bd22</id>
<content type='text'>
Remove "select MSCC_BITBANG_SPI_GPIO" since Kbuild option was deleted
back in commit ace9c103df2875d2b435dbd7b36618020edfd1c0:

  commit ace9c103df2875d2b435dbd7b36618020edfd1c0
  Author: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
  Date:   Tue Jan 8 10:38:35 2019 +0100

    mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.c
</content>
</entry>
<entry>
<title>net: mscc: serval: Add ethernet nodes for Serval</title>
<updated>2019-05-03T14:42:23Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-04-11T12:11:34Z</published>
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<id>urn:sha1:4788704dd803ca7122710d9daf0ca4b337745dfc</id>
<content type='text'>
Add ethernet nodes for Serval SoCs family. There are 2 pcb in this
family: pcb105 and pcb106.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>mips: mscc: serval: Fix reset</title>
<updated>2019-05-03T14:42:23Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-04-15T09:56:36Z</published>
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<id>urn:sha1:72e224b864baa4905b9c5997223baa3e65725be7</id>
<content type='text'>
In case the ddr training was failing, it couldn't reset, it was just
hanging. Therefore reimplement it, so when ddr training is failing
it would call _machine_restart, which power downs the DDR and does
a force reset.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>watchdog: Implement generic watchdog_reset() version</title>
<updated>2019-04-26T07:16:32Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2019-04-11T13:58:44Z</published>
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<id>urn:sha1:06985289d452ad2423145cfed8cece61a7f8cec6</id>
<content type='text'>
This patch tries to implement a generic watchdog_reset() function that
can be used by all boards that want to service the watchdog device in
U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.

Without this approach, new boards or platforms needed to implement a
board specific version of this functionality, mostly copy'ing the same
code over and over again into their board or platforms code base.

With this new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).

This patch also adds a new flag to the GD flags, to flag that the
watchdog is ready to use and adds the pointer to the watchdog device
to the GD. This enables us to remove the global "watchdog_dev"
variable, which was prone to cause problems because of its potentially
very early use in watchdog_reset(), even before the BSS is cleared.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Michal Simek &lt;michal.simek@xilinx.com&gt;
Cc: "Marek Behún" &lt;marek.behun@nic.cz&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Maxim Sloyko &lt;maxims@google.com&gt;
Cc: Erik van Luijk &lt;evanluijk@interact.nl&gt;
Cc: Ryder Lee &lt;ryder.lee@mediatek.com&gt;
Cc: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: "Álvaro Fernández Rojas" &lt;noltari@gmail.com&gt;
Cc: Philippe Reynes &lt;philippe.reynes@softathome.com&gt;
Cc: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Reviewed-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt; (on zcu100)
</content>
</entry>
<entry>
<title>dt: bcm968380gerg: enable nand controller</title>
<updated>2019-04-22T15:56:29Z</updated>
<author>
<name>Philippe Reynes</name>
<email>philippe.reynes@softathome.com</email>
</author>
<published>2019-03-15T14:14:40Z</published>
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<id>urn:sha1:92cd0047a9d4bbd2c0495a68c47c36075211dbaf</id>
<content type='text'>
Enable the nand controller in the device tree
of the board bcm96838gerg.

Signed-off-by: Philippe Reynes &lt;philippe.reynes@softathome.com&gt;
</content>
</entry>
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