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<title>u-boot.git/arch/mips, branch v2023.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/mips?h=v2023.07</id>
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<updated>2023-06-24T17:46:55Z</updated>
<entry>
<title>mips: cpu: Use plain puts() in restart handler</title>
<updated>2023-06-24T17:46:55Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-06-23T18:49:21Z</published>
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<id>urn:sha1:417e20cdf8f8dd5ce7e8c69dc0794e015122aac6</id>
<content type='text'>
This removes dependency on fprintf() , which is not available
in SPL unless full printf support is enabled.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>dm: Emit the arch_cpu_init_dm() even only before relocation</title>
<updated>2023-05-11T02:25:29Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-05-04T22:50:45Z</published>
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<id>urn:sha1:55171aedda88d12666e2a1bbc661dea1bec65337</id>
<content type='text'>
The original function was only called once, before relocation. The new
one is called again after relocation. This was not the intent of the
original call. Fix this by renaming and updating the calling logic.

With this, chromebook_link64 makes it through SPL.

Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>dm: dts: Convert driver model tags to use new schema</title>
<updated>2023-02-14T16:43:26Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-13T15:56:33Z</published>
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<id>urn:sha1:8c103c33fb14086aad6feda504934314d4397dd7</id>
<content type='text'>
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLE</title>
<updated>2023-02-10T12:41:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-05T22:40:23Z</published>
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<id>urn:sha1:7032fa28fdad988b89127daa9241d1b9024a9994</id>
<content type='text'>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_OCTEON_SERIAL_PCIE_CONSOLE defined in Kconfig

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Correct SPL use of OCTEON_SERIAL_BOOTCMD</title>
<updated>2023-02-10T12:41:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-05T22:40:22Z</published>
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<id>urn:sha1:60b0002e25d15eba060160244b05250cf312ad49</id>
<content type='text'>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_OCTEON_SERIAL_BOOTCMD defined in Kconfig

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Correct SPL use of MIPS_CM</title>
<updated>2023-02-10T12:41:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-05T22:40:15Z</published>
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<id>urn:sha1:a8673927910c6354477c4a9889dcba718f43b34a</id>
<content type='text'>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_MIPS_CM defined in Kconfig

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Correct SPL uses of BOOTSTAGE_REPORT</title>
<updated>2023-02-09T21:32:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-05T22:36:20Z</published>
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<id>urn:sha1:b8bffe661f4fac2b07cca7f32a950a6fcdec7533</id>
<content type='text'>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_BOOTSTAGE_REPORT defined in Kconfig

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Correct SPL use of BOOTSTAGE_FDT</title>
<updated>2023-02-09T21:32:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-05T22:36:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e1f0f8ac9f2129dbf08bec94c0e1a57317ae3075'/>
<id>urn:sha1:e1f0f8ac9f2129dbf08bec94c0e1a57317ae3075</id>
<content type='text'>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_BOOTSTAGE_FDT defined in Kconfig

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>gpio: Drop unused pca9698 driver</title>
<updated>2023-02-07T19:33:49Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-01T20:19:56Z</published>
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<id>urn:sha1:408296aad9d662cfb6d3248fc532ce16477fc713</id>
<content type='text'>
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>global: Finish CONFIG -&gt; CFG migration</title>
<updated>2023-01-20T17:27:24Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-01-10T16:19:45Z</published>
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<id>urn:sha1:6e7df1d151a7a127caf3b62ff6dfc003fc2aefcd</id>
<content type='text'>
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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