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<title>u-boot.git/arch/powerpc/cpu/mpc83xx/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/cpu/mpc83xx/Makefile?h=master</id>
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<updated>2024-10-11T17:44:47Z</updated>
<entry>
<title>arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:46Z</published>
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<id>urn:sha1:bef9fdbed2e525ce9264d2ae2fbcb37db7472052</id>
<content type='text'>
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SPL_INIT_MINIMAL et al to Kconfig</title>
<updated>2022-06-06T16:09:00Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-05-13T16:26:35Z</published>
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<id>urn:sha1:b35316fb67cb7aeaf022032ce078135251372f39</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SPL_INIT_MINIMAL
   CONFIG_SPL_FLUSH_IMAGE
   CONFIG_SPL_SKIP_RELOCATE

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>nxp: Migrate a number of DDR related symbols to Kconfig</title>
<updated>2021-08-31T21:46:37Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-08-21T17:50:18Z</published>
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<id>urn:sha1:95372165aec94fa0984f30ca33c3691fe2aabdcd</id>
<content type='text'>
- Guard most of the options in drivers/ddr/fsl/Kconfig with
  SYS_FSL_DDR || SYS_FSL_MMDC.
- Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER
  to Kconfig.
- Clean up the logic for including the DDR_ECC_CMD code.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>powerpc, qe: add DTS support for parallel I/O ports</title>
<updated>2020-09-17T04:09:53Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2020-02-03T09:23:53Z</published>
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<id>urn:sha1:5990b059516c233bf845ad510decd6a44ba9864b</id>
<content type='text'>
add DM support for parallel I/O ports on QUICC Engine Block

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Patch-cc: Mario Six &lt;mario.six@gdsys.cc&gt;
Patch-cc: Qiang Zhao &lt;qiang.zhao@nxp.com&gt;
Patch-cc: Holger Brunck &lt;holger.brunck@hitachi-powergrids.com&gt;

Series-changes: 2
- remove RFC
- fixed Codingstyle errors, therefore new patch
  powerpc, mpc83xx: fix codingstyle issues for qe_io.c
- moved DM part to drivers/pinctrl

Commit-notes:
Open questions / discussion:

- I let the old none DM based implementation in code
  so boards should work with old implementation.

  This should be removed if all boards are converted to
  DM/DTS.

- Unfortunately linux DTS does not use "pinctrl-"
  properties, instead "pio-handle" properties.

  Even worser old U-Boot code initializes all pins
  defined in "const qe_iop_conf_t qe_iop_conf_tab[]"
  table in board code. As linux does the same I decided
  to also scan through all subnodes containing "pio-map"
  property and initialize them too.

  The proper solution would be to check for "pio-handle"
  when a device is probed.

END
</content>
</entry>
<entry>
<title>powerpc: mpc83xx: Fix MPC8308 IMMR memory layout</title>
<updated>2019-05-21T05:52:33Z</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2019-01-21T08:18:04Z</published>
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<id>urn:sha1:a06e665b47c891d1faf6bfd03a3f7cd3a9fea694</id>
<content type='text'>
The MPC8308 has two I2C controllers, but no PCI controller.

Fix the register map layout for this SoC.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06Z</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>powerpc: add 2 common dcache assembly functions</title>
<updated>2015-05-04T16:24:42Z</updated>
<author>
<name>Valentin Longchamp</name>
<email>valentin.longchamp@keymile.com</email>
</author>
<published>2015-03-27T15:07:32Z</published>
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<id>urn:sha1:ac337168ad81a18e768e5e3cfff8d229adeb2b25</id>
<content type='text'>
This patch defines the 2 flush_dcache_range and invalidate_dcache_range
functions for all the powerpc architecture. Their implementation is
borrowed from the kernel's misc_32.S file and replace the ones from
mpc86xx and ppc4xx since they were equivalent.

This is a fix for the problem introduced by this patch:
http://patchwork.ozlabs.org/patch/448849/

Signed-off-by: Valentin Longchamp &lt;valentin.longchamp@keymile.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc8349: Use generic mpc85xx DDR driver</title>
<updated>2013-12-04T22:55:05Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2013-12-03T21:16:59Z</published>
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<id>urn:sha1:1df99080cb6dea9216ee1925f03bd7cc35dc34c7</id>
<content type='text'>
MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
directly. We now can simply enable the macro and use the driver.
Other mpc83xx SoCs still use their own driver.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>Driver/DDR: Moving Freescale DDR driver to a common driver</title>
<updated>2013-11-25T19:43:43Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2013-09-30T16:22:09Z</published>
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<id>urn:sha1:5614e71b4956c579cd4419b958b33fa6316eaa92</id>
<content type='text'>
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc: mpc83xx: Do not create a symbolic link to ddr-gen2.c</title>
<updated>2013-11-17T19:11:33Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-11-11T05:36:06Z</published>
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<id>urn:sha1:5cdee2d41ad4a1a351d50dc7af6d7ff3db549006</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
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