u-boot.git/arch/powerpc/cpu, branch v2012.10 Unnamed repository; edit this file 'description' to name the repository. Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2012-09-25T19:23:55+00:00 Tom Rini trini@ti.com 2012-09-25T19:23:55+00:00 5675b509165b67465a20e5cf71e07f40b449ef0c 






mpc5xxx: add GPIO port configuration
2012-09-01T12:19:52+00:00

Anatolij Gustschin
agust@denx.de

2012-08-12T23:38:10+00:00

d7903ae1593a67f0cbda1c289795cbaff9a4082b

Add posibility for board specifig GPIO configurations using
various CONFIG_SYS_ macros.

Signed-off-by: Anatolij Gustschin <agust@denx.de>





Add posibility for board specifig GPIO configurations using
various CONFIG_SYS_ macros.

Signed-off-by: Anatolij Gustschin <agust@denx.de>







powerpc/85xx: clear out TLB on boot
2012-08-23T17:16:57+00:00

Scott Wood
scottwood@freescale.com

2012-08-20T13:10:08+00:00

3ea21536d773b3b03ffd4005c7e7c3281a542bea

Instead of just shooting down the entry that covers CCSR, clear out
every TLB entry that isn't the one that we're executing out of.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Instead of just shooting down the entry that covers CCSR, clear out
every TLB entry that isn't the one that we're executing out of.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>







powerpc/mpc8xxx: Move HWCONFIG_BUFFER_SIZE into config.h
2012-08-23T17:16:56+00:00

York Sun
yorksun@freescale.com

2012-08-17T09:00:54+00:00

7ac3cc20e09e10051fb42e4bb2325177c8b32e86

Before proper environment is setup, we extract hwconfig and put it into a
buffer with size HWCONFIG_BUFFER_SIZE. We need to enlarge the buffer to
accommodate longer string. Since this macro is used in multiple files, we
move it into arch/powerpc/include/asm/config.h.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Before proper environment is setup, we extract hwconfig and put it into a
buffer with size HWCONFIG_BUFFER_SIZE. We need to enlarge the buffer to
accommodate longer string. Since this macro is used in multiple files, we
move it into arch/powerpc/include/asm/config.h.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>







powerpc/mpc8xxx DDR: Fix interactive DDR debugging
2012-08-23T17:16:56+00:00

York Sun
yorksun@freescale.com

2012-08-17T08:22:43+00:00

1d083ff2c4be7864aacec30a82d01e90b78e680a

Add one more argument to call function readline_into_buffer().
Fix print SPD format for negative values.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Add one more argument to call function readline_into_buffer().
Fix print SPD format for negative values.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>







powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only
2012-08-23T17:16:56+00:00

York Sun
yorksun@freescale.com

2012-08-17T08:22:42+00:00

62f739fe465c41a2c5be0a46b3330c12b213dc07

Only the first DIMM of first controller should fall back to raw timing
parameters if SPD is missing or corrupted.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Only the first DIMM of first controller should fall back to raw timing
parameters if SPD is missing or corrupted.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>







powerpc/mpc8xxx DDR: Fix CAS latency calculation
2012-08-23T17:16:56+00:00

York Sun
yorksun@freescale.com

2012-08-17T08:22:41+00:00

7e4db27ffd11f3eea7e4dfc33354fd087f9257d8

Empty slot should be skipped when calculating CAS latency.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Empty slot should be skipped when calculating CAS latency.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>







powerpc/mpc8xxx: Fix bug for extended DDR timing
2012-08-23T17:16:55+00:00

York Sun
yorksun@freescale.com

2012-08-17T08:22:40+00:00

45064adcae724bd5162f64f186fdb17bfef8ab42

Faster DDR3 timing requires parameters exceeding previously defined
range. Extended parameters are fixed. Added some debug messages.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Faster DDR3 timing requires parameters exceeding previously defined
range. Extended parameters are fixed. Added some debug messages.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>







powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving
2012-08-23T17:16:55+00:00

York Sun
yorksun@freescale.com

2012-08-17T08:22:39+00:00

a4c66509f1b95884e5753d5a30cf2cf884adb821

Restructure DDR interleaving option to support 3 and 4 DDR controllers
for 2-, 3- and 4-way interleaving.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Restructure DDR interleaving option to support 3 and 4 DDR controllers
for 2-, 3- and 4-way interleaving.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>







powerpc/mpc8xxx: Add support for cas latency 12 and above
2012-08-23T17:16:55+00:00

York Sun
yorksun@freescale.com

2012-08-17T08:22:38+00:00

fcea30688fd8c47d54473ffd0f551a5e6efc74a0

Required by JEDEC 79-3E for high speed DDR3.
Also change "CSn disabled" message to debug.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





Required by JEDEC 79-3E for high speed DDR3.
Also change "CSn disabled" message to debug.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>