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<title>u-boot.git/arch/powerpc/cpu, branch v2015.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/cpu?h=v2015.07</id>
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<updated>2015-05-12T22:10:02Z</updated>
<entry>
<title>arch: Make board selection choices optional</title>
<updated>2015-05-12T22:10:02Z</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2015-05-12T19:46:23Z</published>
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<id>urn:sha1:a26cd04920dc069fd6e91abb785426cf6c29f45f</id>
<content type='text'>
By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Remove sc3 board</title>
<updated>2015-05-10T13:59:38Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2015-05-07T11:00:23Z</published>
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<id>urn:sha1:27e721564591f6f0a5246dcee418cac9d061012e</id>
<content type='text'>
As this board seems to be unmaintained for quite some time, and its
not moved to the generic board ingrastructure, lets remove it.

This will also enable us to remove the CONFIG_AUTOBOOT_DELAY_STR2
and CONFIG_AUTOBOOT_STOP_STR2 macros, as this sc3 board is the
only one using one of this macros. A removal patch will follow
soon.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Juergen Beisert &lt;jbeisert@eurodsn.de&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Add board support for ucp1020</title>
<updated>2015-05-04T16:26:26Z</updated>
<author>
<name>Oleksandr G Zhadan</name>
<email>oleks@arcturusnetworks.com</email>
</author>
<published>2015-04-29T20:57:39Z</published>
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<id>urn:sha1:8b0044ff5942943eaa49935f49d5006b346a60f8</id>
<content type='text'>
New QorIQ p1020 based board support from Arcturus Networks Inc.
http://www.arcturusnetworks.com/products/ucp1020/

Signed-off-by: Michael Durrant &lt;mdurrant@arcturusnetworks.com&gt;
Signed-off-by: Oleksandr G Zhadan &lt;oleks@arcturusnetworks.com&gt;
[York Sun: remove patman tags from commit message]
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: Add peripheral clock support</title>
<updated>2015-05-04T16:25:39Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@freescale.com</email>
</author>
<published>2015-04-22T05:57:40Z</published>
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<id>urn:sha1:2d9ca2c72c0fce33052f78f02cdc8ad0a5cf4292</id>
<content type='text'>
The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080. To enable it, define
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@freescale.com&gt;
Cc: York Sun &lt;yorksun@freescale.com&gt;
Cc: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Don't deref NULL if qman portal lacks cell-index</title>
<updated>2015-05-04T16:24:57Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2015-04-17T23:10:06Z</published>
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<id>urn:sha1:438031e1bc0a733f9494f2cb954725cd79543e1e</id>
<content type='text'>
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Cc: Madalin-Cristian Bucur &lt;madalin.bucur@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc: add 2 common dcache assembly functions</title>
<updated>2015-05-04T16:24:42Z</updated>
<author>
<name>Valentin Longchamp</name>
<email>valentin.longchamp@keymile.com</email>
</author>
<published>2015-03-27T15:07:32Z</published>
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<id>urn:sha1:ac337168ad81a18e768e5e3cfff8d229adeb2b25</id>
<content type='text'>
This patch defines the 2 flush_dcache_range and invalidate_dcache_range
functions for all the powerpc architecture. Their implementation is
borrowed from the kernel's misc_32.S file and replace the ones from
mpc86xx and ppc4xx since they were equivalent.

This is a fix for the problem introduced by this patch:
http://patchwork.ozlabs.org/patch/448849/

Signed-off-by: Valentin Longchamp &lt;valentin.longchamp@keymile.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/t4rdb: Add SD boot support for T4240RDB board</title>
<updated>2015-05-04T16:24:04Z</updated>
<author>
<name>Chunhe Lan</name>
<email>Chunhe.Lan@freescale.com</email>
</author>
<published>2015-03-20T09:08:54Z</published>
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<id>urn:sha1:373762c34cd33b4a445b758090daaa87ccfa3fc6</id>
<content type='text'>
This patch adds SD boot support for T4240RDB board. SPL
framework is used. PBL initializes the internal RAM and
copies SPL to it. Then SPL initializes DDR using SPD and
copies u-boot from SD card to DDR, finally SPL transfers
control to u-boot.

Signed-off-by: Chunhe Lan &lt;Chunhe.Lan@freescale.com&gt;
[York Sun: Fix T4240RDB_SDCARD_defcofig]
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>drivers: usb: fsl: Workaround for Erratum A004477</title>
<updated>2015-05-04T16:23:50Z</updated>
<author>
<name>Nikhil Badola</name>
<email>nikhil.badola@freescale.com</email>
</author>
<published>2014-11-21T11:55:21Z</published>
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<id>urn:sha1:0dc78ff857337a82d39d7e4390e317ffbc93097f</id>
<content type='text'>
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode

Signed-off-by: Nikhil Badola &lt;nikhil.badola@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>mpc85xx/T4240EMU: Remove T4240EMU board</title>
<updated>2015-05-04T16:23:46Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2015-04-21T17:09:52Z</published>
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<id>urn:sha1:7fc63cca611b9d2b5f170f9f37e6f99ddf5992a9</id>
<content type='text'>
T4240 SoC has been available for a long time. Emulator support
is no longer needed.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Use GOT when loading IVORs post-relocation</title>
<updated>2015-05-04T16:23:18Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2015-04-24T01:01:56Z</published>
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<id>urn:sha1:e1bfd1c6b7bc0dc530247fd9108feba3147adf36</id>
<content type='text'>
Commit 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
simplified IVOR initialization a bit too much, failing to use the
post-relocation offset.  This doesn't cause a problem with normal NOR
boot, in which both the pre-relocation and post-relocation addresses
are 64 KiB aligned.  However, if TEXT_BASE is only 4 KiB aligned, such
as for NAND/SD/etc. boot on some targets, as well as the QEMU target,
the post-relocation address will not be the same in the lower 16 bits,
as reserve_uboot() ensures that the relocation address is always 64
KiB aligned even if the pre-relocation address was not.

Use the GOT to get the proper post-relocation offsets.

Fixes: 96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Cc: Alexander Graf &lt;agraf@suse.de&gt;
Cc: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Tested-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
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