Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/cpu?h=v2019.01 2018-12-03T15:44:10Z 2018-12-03T15:44:10Z Christophe Leroy christophe.leroy@c-s.fr 2018-11-21T08:51:41Z urn:sha1:71c743c5f787a9babcb2712965fe7d1ddf6ed9f6 Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> 2018-10-29T20:13:05Z Chris Packham judge.packham@gmail.com 2018-10-04T07:03:53Z urn:sha1:4eaf7f525a0874a1eff0f5666004896cc5c89fa3 Workaround makes FS as default mode on all affected socs. Add support to check erratum-A005275 validity for an soc. This info is required to determine whether a given soc is affected by this erratum. Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used to enable workaround for the errata Force FS mode as default by: - making EPS as FS - setting PFSC bit to disable HS chirping This workaround can be disabled by mentioning "no_erratum_a005275" in hwconfig string Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> 2018-09-27T17:13:59Z Jagdish Gediya jagdish.gediya@nxp.com 2018-09-03T16:05:10Z urn:sha1:96699f097a02fc258eb5a24be74f2ad2eeb34d00 Below is the sequence to embed dtb inside U-Boot, 1. Remove bootpg and resetvec section if needed 2. Append dtb 3. Append bootpg and resetvec section back if removed in step 1 Above procedure is required only when CONFIG_MPC85xx and CONFIG_OF_SEPARATE are defined. Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that image has resetvec section. Step 1 and step 3 described above are required only if this config is y. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com> 2018-09-27T17:13:24Z Jagdish Gediya jagdish.gediya@nxp.com 2018-09-03T16:05:05Z urn:sha1:4d3294b1d5281f9c3f62b47ba17250eb0035df4d 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> 2018-09-18T14:12:21Z Mario Six mario.six@gdsys.cc 2018-08-06T08:23:46Z urn:sha1:d2166319df17286b2a3e2a1a7ce89f01e4f8bac9 Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> 2018-09-18T14:12:21Z Mario Six mario.six@gdsys.cc 2018-08-06T08:23:45Z urn:sha1:19fbdca47b3d847824ada3ab2ed575019c88516e Add a CPU driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc> 2018-09-18T06:01:18Z Mario Six mario.six@gdsys.cc 2018-08-06T08:23:38Z urn:sha1:2c21749d7118b66b98cbab3f6301576726e06525 Add a timer driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc> 2018-09-18T06:01:18Z Mario Six mario.six@gdsys.cc 2018-08-06T08:23:36Z urn:sha1:07d538d2814fa03be243c71879372f4263030b78 Add a clock driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc> 2018-09-18T06:01:18Z Mario Six mario.six@gdsys.cc 2018-08-06T08:23:35Z urn:sha1:76fdad1f214beb5170f9979761286279fe8a234a Add a sysreset driver for the MPC83xx platform. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> 2018-09-18T06:01:18Z Mario Six mario.six@gdsys.cc 2018-08-06T08:23:30Z urn:sha1:e40615565d68465284b3c6a5fc4147f662824a88 Add a RAM driver for the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>