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<title>u-boot.git/arch/powerpc/cpu, branch v2024.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/cpu?h=v2024.04</id>
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<updated>2023-11-16T23:53:09Z</updated>
<entry>
<title>powerpc: mpc8xx: Remove usage of common.h</title>
<updated>2023-11-16T23:53:09Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2023-11-06T18:12:04Z</published>
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<id>urn:sha1:80ac19fd56fecdb88c2d34b38a42639be81fa2a5</id>
<content type='text'>
Remove inclusion of common.h and add relevant
includes when necessary.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>powerpc: mpc83xx: Rework includes slightly</title>
<updated>2023-11-07T19:50:51Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-11-01T16:28:11Z</published>
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<id>urn:sha1:dd1365c2e93563e589892fded756a18a39bd8815</id>
<content type='text'>
In order to not rely on common.h providing a number of common includes,
cleanup what we include directly in order to be able to drop common.h
later.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>fsl_qe: Drop common.h</title>
<updated>2023-11-07T19:50:51Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-11-01T16:28:08Z</published>
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<id>urn:sha1:5faf66a2d10cbc813e65005100d778577a16fa04</id>
<content type='text'>
In both include/fsl_qe.h and then also remove common.h from the files
which had included fsl_qe.h

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>mpc85xx: relocate code in non-SPL build</title>
<updated>2023-10-28T13:17:55Z</updated>
<author>
<name>Martin Fäcknitz</name>
<email>faecknitz@hotsplots.de</email>
</author>
<published>2023-10-19T23:06:55Z</published>
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<id>urn:sha1:e9bf0ce6c1e987e7af859e94e5e6ce44dfb4ede0</id>
<content type='text'>
When building a non-SPL image, relocation is needed. This patch restores
the old behaviour before commit b35316fb67cb ("Convert
CONFIG_SPL_INIT_MINIMAL et al to Kconfig") was only defined if
CONFIG_SPL_BUILD was defined.

Fixes: b35316fb67cb ("Convert CONFIG_SPL_INIT_MINIMAL et al to Kconfig")
Signed-off-by: Martin Fäcknitz &lt;faecknitz@hotsplots.de&gt;
</content>
</entry>
<entry>
<title>spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN</title>
<updated>2023-10-06T18:38:12Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-09-26T14:14:27Z</published>
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<id>urn:sha1:3d6d50751469fbadec3e34fbb6d06f21746619dd</id>
<content type='text'>
Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the
malloc pool exists.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Sean Anderson &lt;sean.anderson@seco.com&gt;
</content>
</entry>
<entry>
<title>Kconfigs: Correct default of "0" on hex type entries</title>
<updated>2023-08-09T13:21:42Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-08-02T15:09:43Z</published>
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<id>urn:sha1:a077ac13d03c8cde646ddab30b03ec0f8b753e1e</id>
<content type='text'>
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0".  However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-2023.07-2' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx</title>
<updated>2023-05-07T13:44:27Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-05-07T13:44:27Z</published>
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<id>urn:sha1:1917a1a8a8bad28170cd464e5ea61ff0d738310b</id>
<content type='text'>
This pull request adds misc fixes for cssi boards and activates
CPM relocation in order to enable the use of SCC4 in
QMC (QUICC Multi-Channel) mode.
</content>
</entry>
<entry>
<title>powerpc: mpc8xx: Add SMC relocation CPM microcode</title>
<updated>2023-05-05T05:26:53Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2023-05-03T06:57:33Z</published>
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<id>urn:sha1:e7930e93cc6f8d442a86feeaa4c77332a875b02f</id>
<content type='text'>
In order to use QMC mode in the CPM, a SCC requires more space
in parameter RAM.

After SCC1 there is I2C parameter RAM and after SCC2 there is
SPI parameter RAM. MPC866 and MPC885 can already relocate I2C and.
SPI parameter RAM.

But in order to free space after SCC3 and SCC4, SMC1 and SMC2
need to be relocated. In order to do so, a CPM microcode patch
is required.

Binary data for that patch is copied from Linux kernel.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATA</title>
<updated>2023-05-05T05:26:53Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2023-05-03T06:50:55Z</published>
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<id>urn:sha1:62c5fae511494590e6b8404c315fe156575a0753</id>
<content type='text'>
MPC885 CPU has the following ERRATA:

	When the USB controller is configured in Host mode, and the
	SOF generation (SFTE=1 in USMOD register) is being used,
	there may be false CRC error indication in other SCCs.
	Although the data is received correctly, the CRC result
	will be corrupted.

Add capability to load the related microcode to fix it.
The microcode binary data is copied from Linux kernel.

Other microcode will be added in following patch so make it
a Kconfig choice.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
<entry>
<title>powerpc: mpc8xx: Reorganise init RAM</title>
<updated>2023-05-04T10:40:47Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2023-05-04T08:20:35Z</published>
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<id>urn:sha1:bebb8dfabc3af9eeca4283000571a7400cb88c71</id>
<content type='text'>
Using SMC relocation microcode patch or USB-SOF microcode patch
will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
to 0x3000.

At the time being, init RAM is setup to use 0x2800-0x2e00, but
the stack pointer goes beyond 0x2800 and even beyond 0x2400.

For the time being we are not going to use any microcode patch
that uses memory about 0x3000, so reorganise setup to use:
- 0x2800 - 0x2e00 for init malloc and global data and CPM buffers
- 0x3000 - 0x3c00 for init stack

For more details about CPM dual port ram, see
commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram")

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
</content>
</entry>
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