u-boot.git/arch/powerpc/cpu, branch v2025.04

Merge patch series "Misc. PowerPC MPC83xx fixes/cleanups"

2024-12-30T21:55:33Z

J. Neuschäfer says: This patchset contains a few small fixes/cleanups for the MPC83xx platform. Link: https://lore.kernel.org/r/20241220-mpc83xx-misc-v2-0-ff4c17ee5fa4@posteo.net

powerpc: mpc83xx: Use defined constant for SPCR[TBEN]

2024-12-30T21:55:27Z

To increase readability, use the defined constant instead of specifying SPCR[TBEN] as a number. Reviewed-by: Sinan Akman Signed-off-by: J. Neuschäfer

powerpc: mpc83xx: Allow including initreg.h into multiple files

2024-12-30T21:55:27Z

Globals defined in headers can result in multiple-definition errors while linking, if they are visible beyond the current translation unit. This hasn't been a problem for initreg.h so far, but would become a problem in the next patch, where I use a constant from initreg.h in a second C file. Reviewed-by: Sinan Akman Signed-off-by: J. Neuschäfer

Merge patch series "powerpc: Fix and enforce distinction between immediates and registers"

2024-12-30T21:55:11Z

J. Neuschäfer says: This patchset changes the definition r0 etc. to %r0, so that the assembler can check that registers are only used where expected, and fixes the fallout. Link: https://lore.kernel.org/r/20241212-gpr-checks-v1-0-8c084c5fc0b6@posteo.net

powerpc: Fix 0 vs. r0 confusion in X/D-form instructions

2024-12-30T21:55:07Z

Instructions such as dcbi are in the X-form; they have RA and RB fields and the effective address (EA) is computed as (RA|0)+(RB). In words, this means that if RA is zero, the left-hand side of the addition is zero, otherwise the corresponding GPR is used. r0 can never be used on the left-hand side of a X-form instruction. For D-form instructions such as addis, the Power ISA illustrates this in the instruction pseudo-code: if RA = 0 then RT <- EXTS(SI || 0x0000) else RT <- (RA) + EXIS(SI || 0x0000) In all of these cases, RA=0 indicates the value zero, not register r0. I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig (MPC85xx) that this patch results in the same machine code. Signed-off-by: J. Neuschäfer

lmb: Remove lmb_reserve_flags()

2024-12-30T19:21:55Z

lmb_reserve() is just calling lmb_reserve_flags() with LMB_NONE. There's not much we gain from this abstraction. So let's remove the latter, add the flags argument to lmb_reserve() and make the code a bit easier to follow. Reviewed-by: Tom Rini Reviewed-by: Sam Protsenko Tested-by: Sam Protsenko Signed-off-by: Ilias Apalodimas

arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

2024-10-11T17:44:47Z

Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass

ppc: lmb: move arch specific lmb reservations to arch_misc_init()

2024-09-03T20:08:50Z

All the current function definitions of arch_lmb_reserve() are doing the same thing -- reserve the U-Boot memory region. The powerpc(ppc) architecture, in addition, is making some LMB reservations for the bootm related image loading. Move these ppc specific reservations to the arch_misc_init() function. This allows to move the U-Boot memory region reservation to a different function, and remove arch_lmb_reserve() in a subsequent commit. Signed-off-by: Sughosh Ganu Reviewed-by: Simon Glass

lmb: make LMB memory map persistent and global

2024-09-03T20:08:50Z

The current LMB API's for allocating and reserving memory use a per-caller based memory view. Memory allocated by a caller can then be overwritten by another caller. Make these allocations and reservations persistent using the alloced list data structure. Two alloced lists are declared -- one for the available(free) memory, and one for the used memory. Once full, the list can then be extended at runtime. [sjg: Use a stack to store pointer of lmb struct when running lmb tests] Signed-off-by: Sughosh Ganu Signed-off-by: Simon Glass [sjg: Optimise the logic to add a region in lmb_add_region_flags()]

global_data: Move pci_clk to m68k and powerpc

2024-08-26T20:05:37Z

Only m68k and powerpc use this field, so move it to the arch-specific info, to reduce the size for other archs. Signed-off-by: Simon Glass