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<title>u-boot.git/arch/powerpc/cpu, branch v2026.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2025-06-25T15:50:37Z</updated>
<entry>
<title>lmb: replace lmb_reserve() and lmb_alloc_addr() API's</title>
<updated>2025-06-25T15:50:37Z</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@linaro.org</email>
</author>
<published>2025-06-17T10:43:40Z</published>
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<id>urn:sha1:9d37a3d6e8b862071edfcb9ee95a0fbe45606918</id>
<content type='text'>
There currently are multiple allocation API's in the LMB module. There
are a couple of API's for allocating memory(lmb_alloc() and
lmb_alloc_base()), and then there are two for requesting a reservation
for a particular memory region (lmb_reserve() and
lmb_alloc_addr()). Introduce a single API lmb_alloc_mem() which will
cater to all types of allocation requests and replace lmb_reserve()
and lmb_alloc_addr() with the new API.

Moreover, the lmb_reserve() API is pretty similar to the
lmb_alloc_addr() API, with the one difference being that the
lmb_reserve() API allows for reserving any address passed to it --
the address need not be part of the LMB memory map. The
lmb_alloc_addr() does check that the address being requested is
actually part of the LMB memory map.

There is no need to support reserving memory regions which are outside
the LMB memory map. Remove the lmb_reserve() API functionality and use
the functionality provided by lmb_alloc_addr() instead. The
lmb_alloc_addr() will check if the requested address is part of the
LMB memory map and return an error if not.

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@linaro.org&gt;
Acked-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>include/mmc.h: Audit include list</title>
<updated>2025-06-02T23:26:16Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-05-21T22:51:20Z</published>
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<id>urn:sha1:2cf46de9b6b8463033ba4f9243643d004dc9ea5a</id>
<content type='text'>
This file does not need &lt;linux/sizes.h&gt; nor &lt;linux/compiler.h&gt; so remove
them. This exposes however that a number of other files had been relying
on this implicit include for &lt;linux/sizes.h&gt; so add that where needed.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Misc. PowerPC MPC83xx fixes/cleanups"</title>
<updated>2024-12-30T21:55:33Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-12-30T21:55:33Z</published>
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<id>urn:sha1:ad09ccf7fea365e380d7c7c74e9b87b4c09f30ce</id>
<content type='text'>
J. Neuschäfer &lt;j.ne@posteo.net&gt; says:

This patchset contains a few small fixes/cleanups for the MPC83xx
platform.

Link: https://lore.kernel.org/r/20241220-mpc83xx-misc-v2-0-ff4c17ee5fa4@posteo.net
</content>
</entry>
<entry>
<title>powerpc: mpc83xx: Use defined constant for SPCR[TBEN]</title>
<updated>2024-12-30T21:55:27Z</updated>
<author>
<name>J. Neuschäfer</name>
<email>j.ne@posteo.net</email>
</author>
<published>2024-12-20T10:37:53Z</published>
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<id>urn:sha1:ba26b1d0fb923c0b145f15d132dc7561267bb8a9</id>
<content type='text'>
To increase readability, use the defined constant instead of specifying
SPCR[TBEN] as a number.

Reviewed-by: Sinan Akman &lt;sinan@writeme.com&gt;
Signed-off-by: J. Neuschäfer &lt;j.ne@posteo.net&gt;
</content>
</entry>
<entry>
<title>powerpc: mpc83xx: Allow including initreg.h into multiple files</title>
<updated>2024-12-30T21:55:27Z</updated>
<author>
<name>J. Neuschäfer</name>
<email>j.ne@posteo.net</email>
</author>
<published>2024-12-20T10:37:52Z</published>
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<id>urn:sha1:b3e8c67a91b6e614fa84db270010da4faa702a42</id>
<content type='text'>
Globals defined in headers can result in multiple-definition errors
while linking, if they are visible beyond the current translation unit.

This hasn't been a problem for initreg.h so far, but would become a
problem in the next patch, where I use a constant from initreg.h in a
second C file.

Reviewed-by: Sinan Akman &lt;sinan@writeme.com&gt;
Signed-off-by: J. Neuschäfer &lt;j.ne@posteo.net&gt;
</content>
</entry>
<entry>
<title>Merge patch series "powerpc: Fix and enforce distinction between immediates and registers"</title>
<updated>2024-12-30T21:55:11Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-12-30T21:55:11Z</published>
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<id>urn:sha1:c379590ab7eaabc00c21eb49796d99627d33ac97</id>
<content type='text'>
J. Neuschäfer &lt;j.ne@posteo.net&gt; says:

This patchset changes the definition r0 etc. to %r0, so that the
assembler can check that registers are only used where expected, and
fixes the fallout.

Link: https://lore.kernel.org/r/20241212-gpr-checks-v1-0-8c084c5fc0b6@posteo.net
</content>
</entry>
<entry>
<title>powerpc: Fix 0 vs. r0 confusion in X/D-form instructions</title>
<updated>2024-12-30T21:55:07Z</updated>
<author>
<name>J. Neuschäfer</name>
<email>j.ne@posteo.net</email>
</author>
<published>2024-12-12T17:05:46Z</published>
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<id>urn:sha1:fd1c2938c0ef23db322b974a5d2b8020aa6a8750</id>
<content type='text'>
Instructions such as dcbi are in the X-form; they have RA and RB fields
and the effective address (EA) is computed as (RA|0)+(RB). In words,
this means that if RA is zero, the left-hand side of the addition is
zero, otherwise the corresponding GPR is used. r0 can never be used on
the left-hand side of a X-form instruction.

For D-form instructions such as addis, the Power ISA illustrates this in
the instruction pseudo-code:

	if RA = 0 then RT &lt;-        EXTS(SI || 0x0000)
	else           RT &lt;- (RA) + EXIS(SI || 0x0000)

In all of these cases, RA=0 indicates the value zero, not register r0.

I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig
(MPC85xx) that this patch results in the same machine code.

Signed-off-by: J. Neuschäfer &lt;j.ne@posteo.net&gt;
</content>
</entry>
<entry>
<title>lmb: Remove lmb_reserve_flags()</title>
<updated>2024-12-30T19:21:55Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2024-12-18T07:02:32Z</published>
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<id>urn:sha1:900a8951c3b6035c25632438ebc7240cbc77883c</id>
<content type='text'>
lmb_reserve() is just calling lmb_reserve_flags() with LMB_NONE.
There's not much we gain from this abstraction.
So let's remove the latter, add the flags argument to lmb_reserve()
and make the code a bit easier to follow.

Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Tested-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:46Z</published>
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<id>urn:sha1:bef9fdbed2e525ce9264d2ae2fbcb37db7472052</id>
<content type='text'>
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ppc: lmb: move arch specific lmb reservations to arch_misc_init()</title>
<updated>2024-09-03T20:08:50Z</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@linaro.org</email>
</author>
<published>2024-08-26T11:59:29Z</published>
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<id>urn:sha1:17f695dd1bead58139b6649e516e0770b3d8a25e</id>
<content type='text'>
All the current function definitions of arch_lmb_reserve() are doing
the same thing -- reserve the U-Boot memory region. The powerpc(ppc)
architecture, in addition, is making some LMB reservations for the
bootm related image loading. Move these ppc specific reservations to
the arch_misc_init() function. This allows to move the U-Boot memory
region reservation to a different function, and remove
arch_lmb_reserve() in a subsequent commit.

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@linaro.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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