<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/powerpc/include/asm/fsl_secure_boot.h, branch v2016.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>SECURE_BOOT: Enable SD as a source for bootscript</title>
<updated>2016-07-26T16:01:43+00:00</updated>
<author>
<name>Sumit Garg</name>
<email>sumit.garg@nxp.com</email>
</author>
<published>2016-06-14T17:52:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=69d4b48c84b9c2b762066c5a68406a53e49ea2f3'/>
<id>69d4b48c84b9c2b762066c5a68406a53e49ea2f3</id>
<content type='text'>
Add support for reading bootscript and bootscript header from SD. Also
renamed macros *_FLASH to *_DEVICE to represent SD alongwith NAND and
NOR flash.

Reviewed-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for reading bootscript and bootscript header from SD. Also
renamed macros *_FLASH to *_DEVICE to represent SD alongwith NAND and
NOR flash.

Reviewed-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: T104x: Add nand secure boot target</title>
<updated>2016-07-21T18:09:34+00:00</updated>
<author>
<name>Sumit Garg</name>
<email>sumit.garg@nxp.com</email>
</author>
<published>2016-07-14T16:27:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa36c84edfcfd8c7d0348511e7b0fbb43514cd35'/>
<id>aa36c84edfcfd8c7d0348511e7b0fbb43514cd35</id>
<content type='text'>
For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC.
In non-secure boot scenario from NAND, this address will map to CPC
configured as SRAM. But in case of secure boot, this default address
always maps to IBR (Internal Boot ROM).
The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G
address space i.e. 0x0 - 0xDFFFFFFF.

For secure boot target from NAND, the text base for SPL is kept same as
non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will
be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000)
As a the virtual and physical address of CPC would be different. The
virtual address 0xFFFx_xxxx needs to be mapped to physical address
0xBFFx_xxxx.

Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000
and update DCFG SCRTACH1 register with location of Header required for
secure boot.

The changes are similar to
commit 467a40dfe35f48d830f01a72617207d03ca85b4d
    powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041

While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC
is only 256K and thus SPL framework is used.
The changes are only applicable for SPL U-Boot running out of CPC SRAM
and not the next level U-Boot loaded on DDR.

Reviewed-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC.
In non-secure boot scenario from NAND, this address will map to CPC
configured as SRAM. But in case of secure boot, this default address
always maps to IBR (Internal Boot ROM).
The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G
address space i.e. 0x0 - 0xDFFFFFFF.

For secure boot target from NAND, the text base for SPL is kept same as
non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will
be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000)
As a the virtual and physical address of CPC would be different. The
virtual address 0xFFFx_xxxx needs to be mapped to physical address
0xBFFx_xxxx.

Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000
and update DCFG SCRTACH1 register with location of Header required for
secure boot.

The changes are similar to
commit 467a40dfe35f48d830f01a72617207d03ca85b4d
    powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041

While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC
is only 256K and thus SPL framework is used.
The changes are only applicable for SPL U-Boot running out of CPC SRAM
and not the next level U-Boot loaded on DDR.

Reviewed-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL</title>
<updated>2016-07-21T18:09:23+00:00</updated>
<author>
<name>Sumit Garg</name>
<email>sumit.garg@nxp.com</email>
</author>
<published>2016-07-14T16:27:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8f01397ba76d1ee210bedbf031d807e8df34c482'/>
<id>8f01397ba76d1ee210bedbf031d807e8df34c482</id>
<content type='text'>
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate
the next level U-boot image. Add a new function spl_validate_uboot to
perform the validation.

Enable hardware crypto operations in SPL using SEC block.
In case of Secure Boot, PAMU is not bypassed. For allowing SEC block
access to CPC configured as SRAM, configure PAMU.

Reviewed-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate
the next level U-boot image. Add a new function spl_validate_uboot to
perform the validation.

Enable hardware crypto operations in SPL using SEC block.
In case of Secure Boot, PAMU is not bypassed. For allowing SEC block
access to CPC configured as SRAM, configure PAMU.

Reviewed-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Kconfig: Move CONFIG_FIT and related options to Kconfig</title>
<updated>2016-03-14T23:18:07+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-02-23T05:55:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73223f0e1bd0e37925ae1b7f21b51733145571dc'/>
<id>73223f0e1bd0e37925ae1b7f21b51733145571dc</id>
<content type='text'>
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.

Move these options to Kconfig and tidy up board configuration:

   CONFIG_FIT
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_FIT_SIGNATURE
   CONFIG_FIT_BEST_MATCH
   CONFIG_FIT_VERBOSE
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_RSA

Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.

Note: Masahiro's moveconfig.py script is amazing.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.

Move these options to Kconfig and tidy up board configuration:

   CONFIG_FIT
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_FIT_SIGNATURE
   CONFIG_FIT_BEST_MATCH
   CONFIG_FIT_VERBOSE
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_RSA

Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.

Note: Masahiro's moveconfig.py script is amazing.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>freescale: Remove CONFIG_DM from header files</title>
<updated>2016-03-14T18:21:27+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-02-23T05:55:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e971632cd6dae4fc2b30c600ff5650ecf8944f1'/>
<id>9e971632cd6dae4fc2b30c600ff5650ecf8944f1</id>
<content type='text'>
Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
Remove the hacks which enable CONFIG_DM in header files and update the
defconfig.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
Remove the hacks which enable CONFIG_DM in header files and update the
defconfig.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>secure_boot: enable chain of trust for PowerPC platforms</title>
<updated>2016-01-27T16:12:56+00:00</updated>
<author>
<name>Aneesh Bansal</name>
<email>aneesh.bansal@nxp.com</email>
</author>
<published>2016-01-22T11:07:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d0a6d7ce55ec40d23ad96b549d596afd8f70735c'/>
<id>d0a6d7ce55ec40d23ad96b549d596afd8f70735c</id>
<content type='text'>
Chain of Trust is enabled for PowerPC platforms for Secure Boot.
CONFIG_BOARD_LATE_INIT is defined.
In board_late_init(), fsl_setenv_chain_of_trust() is called which
will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables:
   bootdelay = 0 (To disable Boot Prompt)
   bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Acked-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Chain of Trust is enabled for PowerPC platforms for Secure Boot.
CONFIG_BOARD_LATE_INIT is defined.
In board_late_init(), fsl_setenv_chain_of_trust() is called which
will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables:
   bootdelay = 0 (To disable Boot Prompt)
   bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Acked-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>secure_boot: split the secure boot functionality in two parts</title>
<updated>2016-01-27T16:12:32+00:00</updated>
<author>
<name>Aneesh Bansal</name>
<email>aneesh.bansal@nxp.com</email>
</author>
<published>2016-01-22T11:07:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bdc22074c511def222f93d1a9d94ec95c462c062'/>
<id>bdc22074c511def222f93d1a9d94ec95c462c062</id>
<content type='text'>
There are two phases in Secure Boot
1. ISBC: In BootROM, validate the BootLoader (U-Boot).
2. ESBC: In U-Boot, continuing the Chain of Trust by
         validating and booting LINUX.

For ESBC phase, there is no difference in SoC's based on ARM or
PowerPC cores.

But the exit conditions after ISBC phase i.e. entry conditions for
U-Boot are different for ARM and PowerPC.
PowerPC:

If Secure Boot is executed, a separate U-Boot target is required
which must be compiled with a diffrent Text Base as compared to
Non-Secure Boot. There are some LAW and TLB settings which are
required specifically for Secure Boot scenario.

ARM:
ARM based SoC's have a fixed memory map and exit conditions from
BootROM are same irrespective of boot mode (Secure or Non-Secure).

Thus the current Secure Boot functionlity has been split into
two parts:
CONFIG_CHAIN_OF_TRUST
This will have the following functionality as part of U-Boot:
1. Enable commands like esbc_validate, esbc_halt
2. Change the environment settings based on bootmode, determined
   at run time:
     - If bootmode is non-secure, no change
     - If bootmode is secure, set the following:
         - bootdelay = 0 (Don't give boot prompt)
         - bootcmd = Validate and execute the bootscript.

CONFIG_SECURE_BOOT
This is defined only for creating a different compile time target
for secure boot.

Traditionally, both these functionalities were defined under
CONFIG_SECURE_BOOT. This patch is aimed at removing the requirement
for a separate Secure Boot target for ARM based SoC's.
CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be
determine at run time.

Another Security Requirement for running CHAIN_OF_TRUST is that
U-Boot environemnt must not be picked from flash/external memory.
This cannot be done based on bootmode at run time in current U-Boot
architecture. Once this dependency is resolved, no separate
SECURE_BOOT target will be required for ARM based SoC's.

Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is
defining CONFIG_ENV_IS_NOWHERE

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Acked-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are two phases in Secure Boot
1. ISBC: In BootROM, validate the BootLoader (U-Boot).
2. ESBC: In U-Boot, continuing the Chain of Trust by
         validating and booting LINUX.

For ESBC phase, there is no difference in SoC's based on ARM or
PowerPC cores.

But the exit conditions after ISBC phase i.e. entry conditions for
U-Boot are different for ARM and PowerPC.
PowerPC:

If Secure Boot is executed, a separate U-Boot target is required
which must be compiled with a diffrent Text Base as compared to
Non-Secure Boot. There are some LAW and TLB settings which are
required specifically for Secure Boot scenario.

ARM:
ARM based SoC's have a fixed memory map and exit conditions from
BootROM are same irrespective of boot mode (Secure or Non-Secure).

Thus the current Secure Boot functionlity has been split into
two parts:
CONFIG_CHAIN_OF_TRUST
This will have the following functionality as part of U-Boot:
1. Enable commands like esbc_validate, esbc_halt
2. Change the environment settings based on bootmode, determined
   at run time:
     - If bootmode is non-secure, no change
     - If bootmode is secure, set the following:
         - bootdelay = 0 (Don't give boot prompt)
         - bootcmd = Validate and execute the bootscript.

CONFIG_SECURE_BOOT
This is defined only for creating a different compile time target
for secure boot.

Traditionally, both these functionalities were defined under
CONFIG_SECURE_BOOT. This patch is aimed at removing the requirement
for a separate Secure Boot target for ARM based SoC's.
CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be
determine at run time.

Another Security Requirement for running CHAIN_OF_TRUST is that
U-Boot environemnt must not be picked from flash/external memory.
This cannot be done based on bootmode at run time in current U-Boot
architecture. Once this dependency is resolved, no separate
SECURE_BOOT target will be required for ARM based SoC's.

Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is
defining CONFIG_ENV_IS_NOWHERE

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Acked-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>secure_boot: include/configs: move definition of CONFIG_CMD_BLOB</title>
<updated>2016-01-27T16:12:26+00:00</updated>
<author>
<name>Aneesh Bansal</name>
<email>aneesh.bansal@nxp.com</email>
</author>
<published>2016-01-22T11:07:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=74eecd820f251c6700c828d662a600c01651217f'/>
<id>74eecd820f251c6700c828d662a600c01651217f</id>
<content type='text'>
CONFIG_CMD_BLOB must be defined in case of Secure Boot. It was
earlier defined in all config files. The definition has been
moved to a common file which is included by all configs.

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Acked-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CONFIG_CMD_BLOB must be defined in case of Secure Boot. It was
earlier defined in all config files. The definition has been
moved to a common file which is included by all configs.

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Acked-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SECURE_BOOT: Disable IE Key feature for RAMBOOT</title>
<updated>2015-09-02T02:38:02+00:00</updated>
<author>
<name>Aneesh Bansal</name>
<email>aneesh.bansal@freescale.com</email>
</author>
<published>2015-07-31T08:40:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2ed948f466b2715a82c25ca25f5839c9bbaea6e3'/>
<id>2ed948f466b2715a82c25ca25f5839c9bbaea6e3</id>
<content type='text'>
ISBC Key Extension feature is not applicable for RAMBOOT
as there is no way to retrieve the CSF Header and validated
IE Key table from SRAM once CPC has been disabled.
The feature is only applicable in case of NOR SECURE BOOT.
Code Cleanup:
The SECURE_BOOT specific defines have been moved from
arch-ls102xa/config.h to
arm/include/asm/fsl_secure_boot.h

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ISBC Key Extension feature is not applicable for RAMBOOT
as there is no way to retrieve the CSF Header and validated
IE Key table from SRAM once CPC has been disabled.
The feature is only applicable in case of NOR SECURE BOOT.
Code Cleanup:
The SECURE_BOOT specific defines have been moved from
arch-ls102xa/config.h to
arm/include/asm/fsl_secure_boot.h

Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: SECURE BOOT-Copy Boot Script on RAM</title>
<updated>2015-07-31T15:50:18+00:00</updated>
<author>
<name>Aneesh Bansal</name>
<email>aneesh.bansal@freescale.com</email>
</author>
<published>2015-06-16T05:06:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5050f6f0e56af0e02c3e362d9af2b628d6c8da12'/>
<id>5050f6f0e56af0e02c3e362d9af2b628d6c8da12</id>
<content type='text'>
For running Chain of Trust when doing Secure Boot from NAND,
the Bootscript header and bootscript must be copied from NAND
to RAM(DDR).
The addresses and commands for the same have been defined.

Signed-off-by: Saksham Jain &lt;saksham@freescale.com&gt;
Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For running Chain of Trust when doing Secure Boot from NAND,
the Bootscript header and bootscript must be copied from NAND
to RAM(DDR).
The addresses and commands for the same have been defined.

Signed-off-by: Saksham Jain &lt;saksham@freescale.com&gt;
Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
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</content>
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