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<title>u-boot.git/arch/powerpc/include/asm, branch v2015.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/include/asm?h=v2015.07</id>
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<updated>2015-05-04T16:26:09Z</updated>
<entry>
<title>powerpc/mpc85xx: Fix compiling error for common/cmd_gpio.c</title>
<updated>2015-05-04T16:26:09Z</updated>
<author>
<name>Oleksandr G Zhadan</name>
<email>oleks@arcturusnetworks.com</email>
</author>
<published>2015-04-28T17:59:50Z</published>
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<id>urn:sha1:d7732faad3104369fca72c071818b95ddb3e35db</id>
<content type='text'>
To replicate:
1. add to include/configs/p1_p2_rdb_pc.h "#define CONFIG_CMD_GPIO"
2. run `make P1020RDB-PC_defconfig`
3. run CROSS_COMPILE=powerpc-linux- make

and you will get:
common/built-in.o: In function `do_gpio':
u-boot/common/cmd_gpio.c:186: undefined reference to `gpio_request'
u-boot/common/cmd_gpio.c:194: undefined reference to `gpio_direction_input'
u-boot/common/cmd_gpio.c:195: undefined reference to `gpio_get_value'
u-boot/common/cmd_gpio.c:200: undefined reference to `gpio_get_value'
u-boot/common/cmd_gpio.c:203: undefined reference to `gpio_direction_output'
u-boot/common/cmd_gpio.c:209: undefined reference to `gpio_free

Signed-off-by: Michael Durrant &lt;mdurrant@arcturusnetworks.com&gt;
Signed-off-by: Oleksandr G Zhadan &lt;oleks@arcturusnetworks.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: Add peripheral clock support</title>
<updated>2015-05-04T16:25:39Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@freescale.com</email>
</author>
<published>2015-04-22T05:57:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2d9ca2c72c0fce33052f78f02cdc8ad0a5cf4292'/>
<id>urn:sha1:2d9ca2c72c0fce33052f78f02cdc8ad0a5cf4292</id>
<content type='text'>
The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080. To enable it, define
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@freescale.com&gt;
Cc: York Sun &lt;yorksun@freescale.com&gt;
Cc: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: Add adapter card type identification support</title>
<updated>2015-05-04T16:25:19Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@freescale.com</email>
</author>
<published>2015-04-22T05:57:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb'/>
<id>urn:sha1:5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb</id>
<content type='text'>
Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@freescale.com&gt;
Cc: York Sun &lt;yorksun@freescale.com&gt;
Cc: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>fsl/pci: Set CFG_READY for PCIe v3.0 and later</title>
<updated>2015-05-04T16:24:23Z</updated>
<author>
<name>Minghuan Lian</name>
<email>Minghuan.Lian@freescale.com</email>
</author>
<published>2015-03-27T05:24:39Z</published>
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<id>urn:sha1:1d0b59a9b049443397f484ad03b88c6314bc7ebb</id>
<content type='text'>
Freescale PCIe controllers v3.0 and later need to set bit
CFG_READY to allow all inbound configuration transactions
to be processed normally when in EP mode. However, bit
CFG_READY has been moved from PCIe configuration space to
CCSR PCIe configuration register comparing previous version.
The patch is to set this bit according to PCIe version.

Signed-off-by: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;
Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Signed-off-by: Minghuan Lian &lt;Minghuan.Lian@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>drivers: usb: fsl: Workaround for Erratum A004477</title>
<updated>2015-05-04T16:23:50Z</updated>
<author>
<name>Nikhil Badola</name>
<email>nikhil.badola@freescale.com</email>
</author>
<published>2014-11-21T11:55:21Z</published>
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<id>urn:sha1:0dc78ff857337a82d39d7e4390e317ffbc93097f</id>
<content type='text'>
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode

Signed-off-by: Nikhil Badola &lt;nikhil.badola@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>net/memac_phy: reuse driver for little endian SoCs</title>
<updated>2015-04-23T15:55:57Z</updated>
<author>
<name>Shaohui Xie</name>
<email>Shaohui.Xie@freescale.com</email>
</author>
<published>2015-03-21T02:28:19Z</published>
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<id>urn:sha1:cd348efa6c8c38cc95495a34d784f9ea159ca41d</id>
<content type='text'>
The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>Add bootscript support to esbc_validate.</title>
<updated>2015-04-21T17:19:19Z</updated>
<author>
<name>gaurav rana</name>
<email>gaurav.rana@freescale.com</email>
</author>
<published>2015-03-10T08:38:50Z</published>
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<id>urn:sha1:98cb0efde8aaed200750e6d75fa8e5fc01dcd8f4</id>
<content type='text'>
1. Default environment will be used for secure boot flow
 which can't be edited or saved.
2. Command for secure boot is predefined in the default
 environment which will run on autoboot (and autoboot is
 the only option allowed in case of secure boot) and it
 looks like this:
 #define CONFIG_SECBOOT \
 "setenv bs_hdraddr 0xe8e00000;"                 \
 "esbc_validate $bs_hdraddr;"                    \
 "source $img_addr;"                             \
 "esbc_halt;"
 #endif
3. Boot Script can contain esbc_validate commands and bootm command.
 Uboot source command used in default secure boot command will
 run the bootscript.
4. Command esbc_halt added to ensure either bootm executes
 after validation of images or core should just spin.

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
Signed-off-by: Gaurav Rana &lt;gaurav.rana@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/t2080: enable erratum_a007186 for t2080 rev1.1</title>
<updated>2015-04-20T17:15:29Z</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2015-03-09T09:12:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9ca0d35f24b1b1e21c609a521933fd4d6598f9ff'/>
<id>urn:sha1:9ca0d35f24b1b1e21c609a521933fd4d6598f9ff</id>
<content type='text'>
T2080 rev1.1 also needs erratum a007186.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>SECURE_BOOT : enable esbc_validate command for powerpc and arm platforms.</title>
<updated>2015-03-05T20:04:59Z</updated>
<author>
<name>gaurav rana</name>
<email>gaurav.rana@freescale.com</email>
</author>
<published>2015-02-27T04:16:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e04916a721a2069fc770412c57974d02e153ad18'/>
<id>urn:sha1:e04916a721a2069fc770412c57974d02e153ad18</id>
<content type='text'>
esbc_validate command uses various IP Blocks: Security Monitor, CAAM block
and SFP registers. Hence the respective CONFIG's are enabled.

Apart from these CONFIG_SHA_PROG_HW_ACCEL and CONFIG_RSA are also enabled.

Signed-off-by: Gaurav Rana &lt;gaurav.rana@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>fsl_sfp : Move ccsr_sfp_regs definition to common include</title>
<updated>2015-03-05T20:04:59Z</updated>
<author>
<name>gaurav rana</name>
<email>gaurav.rana@freescale.com</email>
</author>
<published>2015-02-27T04:13:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a2e225e65df3d0fe0ddefec77a3db05b881d1e68'/>
<id>urn:sha1:a2e225e65df3d0fe0ddefec77a3db05b881d1e68</id>
<content type='text'>
Freescale sfp has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
sfp_regs to common include. This patch also defines ccsr_sfp_regs
definition for newer versions of SFP.

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
Signed-off-by: Gaurav Rana &lt;gaurav.rana@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
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