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<title>u-boot.git/arch/powerpc/include, branch v2013.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/include?h=v2013.10</id>
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<updated>2013-10-14T20:06:53Z</updated>
<entry>
<title>Coding Style cleanup: remove trailing white space</title>
<updated>2013-10-14T20:06:53Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-10-07T11:07:26Z</published>
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<id>urn:sha1:3765b3e7bd0f8e46914d417f29cbcb0c72b1acf7</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>SPDX: fix IBM-pibs license identifier</title>
<updated>2013-09-20T14:30:54Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-09-17T09:24:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1b387ef55c7a10a87814f3d8ffc04b62fbfc150e'/>
<id>urn:sha1:1b387ef55c7a10a87814f3d8ffc04b62fbfc150e</id>
<content type='text'>
The SPDX License List version 1.19 now contains an official entry for
the IBM-pibs license.  However, instead of our suggestion "ibm-pibs",
the SPDX License List uses "IBM-pibs", with the following rationale:
"The reason being that all other SPDX License List short identifiers
tend towards using capital letters unless spelling a word.  I'd prefer
to be consistent to this end".

Change the license IDs to use the official name.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Add workaround for erratum A-005125</title>
<updated>2013-09-10T21:31:47Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2013-08-20T22:09:43Z</published>
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<id>urn:sha1:954a1a4776d135f2c6ee5276a96c0da71744cd6d</id>
<content type='text'>
In a very rare condition, a system hang is possible when the e500 core
initiates a guarded load to PCI / PCIe /SRIO performs a coherent write
to memory. Please refer to errata document for more details. This erratum
applies to the following SoCs and their variants, if any.

BSC9132
BSC9131
MPC8536
MPC8544
MPC8548
MPC8569
MPC8572
P1010
P1020
P1021
P1022
P1023
P2020
C29x

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
CC: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx</title>
<updated>2013-08-21T20:27:47Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-08-21T20:27:47Z</published>
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<id>urn:sha1:6612ab33956ae09c5ba2fde9c1540b519625ba37</id>
<content type='text'>
</content>
</entry>
<entry>
<title>powerpc/sec: Add workaround for SEC A-003571</title>
<updated>2013-08-20T17:47:07Z</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2013-08-15T01:31:47Z</published>
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<id>urn:sha1:424bf94273b2cd0171eca7ed5619b211f1b96d8f</id>
<content type='text'>
Multiple read/write transactions initiated by security
engine may cause system to hang.
Workaround: set MCFGR[AXIPIPE] to 0 to avoid hang.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Acked-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Remove support for PPC405CR CPUs</title>
<updated>2013-08-20T15:35:24Z</updated>
<author>
<name>Matthias Fuchs</name>
<email>matthias.fuchs@esd.eu</email>
</author>
<published>2013-08-07T10:10:38Z</published>
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<id>urn:sha1:3fb858891273945ce2238e6d4dac3363a1fb0853</id>
<content type='text'>
This patch removes support for the APM 405CR CPU.
This CPU is EOL and no board uses this chip.

Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
</content>
</entry>
<entry>
<title>fsl_i2c: add workaround for the erratum I2C A004447</title>
<updated>2013-08-20T09:15:31Z</updated>
<author>
<name>Chunhe Lan</name>
<email>Chunhe.Lan@freescale.com</email>
</author>
<published>2013-08-16T07:10:37Z</published>
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<id>urn:sha1:9c3f77eb3bc0e1e24fc66bd41655fecddb6403ec</id>
<content type='text'>
This workaround is for the erratum I2C A004447. Device reference
manual provides a scheme that allows the I2C master controller
to generate nine SCL pulses, which enable an I2C slave device
that held SDA low to release SDA. However, due to this erratum,
this scheme no longer works. In addition, when I2C is used as
a source of the PBL, the state machine is not able to recover.

At the same time, delete the reduplicative definition of SVR_VER
and SVR_REV. The SVR_REV is the low 8 bits rather than the low 16
bits of svr. And we use the CONFIG_SYS_FSL_A004447_SVR_REV macro
instead of hard-code value 0x10, 0x11 and 0x20.

The CONFIG_SYS_FSL_A004447_SVR_REV = 0x00 represents that one
version of platform has this I2C errata. So enable this errata
by IS_SVR_REV(svr, maj, min) function.

Signed-off-by: Zhao Chenhui &lt;chenhui.zhao@freescale.com&gt;
Signed-off-by: Chunhe Lan &lt;Chunhe.Lan@freescale.com&gt;
Cc: Scott Wood &lt;scottwood@freescale.com&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>SPDX-License-Identifier: convert PIBS licensed files</title>
<updated>2013-08-19T19:34:14Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-28T20:12:45Z</published>
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<id>urn:sha1:46263f2de4e01ff0b2e4247c2fa76d24027efd65</id>
<content type='text'>
This commit adapts the files that were derived from PIBS (PowerPC
Initialization and Boot Software) codeto using SPDX License
Identifiers.

So far, SPDX has not assigned an official License ID for the PIBS
license yet, so this should be considered preliminary.

Note that the following files contained incorrect license information:

	arch/powerpc/cpu/ppc4xx/4xx_uart.c
	arch/powerpc/cpu/ppc4xx/start.S
	arch/powerpc/include/asm/ppc440.h

These files included, in addition to the GPL-2.0 / ibm-pibs dual
license as inherited from PIBS, a GPL-2.0+ license header which was
obviously incorrect.  This has been removed.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;

Conflicts:
	Licenses/README
Acked-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>fsl/usb: Move USB internal phy definitions to fsl_usb.h</title>
<updated>2013-08-14T17:58:01Z</updated>
<author>
<name>ramneek mehresh</name>
<email>ramneek.mehresh@freescale.com</email>
</author>
<published>2013-08-05T10:30:16Z</published>
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<id>urn:sha1:9dee205d78402c6c48076735859f4e1a293cf693</id>
<content type='text'>
fsl_usb.h file created to share data bewteen usb platform code
and usb ip driver. Internal phy structure definitions moved to
this file

Signed-off-by: Ramneek Mehresh &lt;ramneek.mehresh@freescale.com&gt;
Acked-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx:Avoid hardcoded init for serdes block 1 &amp; 2</title>
<updated>2013-08-14T17:57:49Z</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar@freescale.com</email>
</author>
<published>2013-07-31T11:26:41Z</published>
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<id>urn:sha1:a4c955bc3b23a38dc2c5c60b655a4d01eff93cec</id>
<content type='text'>
It is not necessary for all processor to have serdes block 1 &amp; 2.
They may have only one serdes block.

So, put serdes block 1 &amp; 2 related code under defines

Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Acked-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
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