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<title>u-boot.git/arch/powerpc/include, branch v2016.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>dm: gpio: Add driver for MPC85XX GPIO controller</title>
<updated>2016-06-04T05:13:24+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-05-25T13:15:20+00:00</published>
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<id>07d31f8f98fb350776c78a681ef27fd8ee288acd</id>
<content type='text'>
This patch adds a driver for the built-in GPIO controller of the MPC85XX
SoC (probably supporting other PowerQUICC III SoCs as well).

Each GPIO bank is identified by its own entry in the device tree, i.e.

gpio-controller@fc00 {
      #gpio-cells = &lt;2&gt;;
      compatible = "fsl,pq3-gpio";
      reg = &lt;0xfc00 0x100&gt;
}

By default, each bank is assumed to have 32 GPIOs, but the ngpios
setting is honored, so the number of GPIOs for each bank in configurable
to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of
the P1022 SoC).

The usual functions of GPIO drivers (setting input/output mode and output
value setting) are supported.

The driver has been tested on MPC85XX, but it is likely that other
PowerQUICC III devices will work as well.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
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<pre>
This patch adds a driver for the built-in GPIO controller of the MPC85XX
SoC (probably supporting other PowerQUICC III SoCs as well).

Each GPIO bank is identified by its own entry in the device tree, i.e.

gpio-controller@fc00 {
      #gpio-cells = &lt;2&gt;;
      compatible = "fsl,pq3-gpio";
      reg = &lt;0xfc00 0x100&gt;
}

By default, each bank is assumed to have 32 GPIOs, but the ngpios
setting is honored, so the number of GPIOs for each bank in configurable
to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of
the P1022 SoC).

The usual functions of GPIO drivers (setting input/output mode and output
value setting) are supported.

The driver has been tested on MPC85XX, but it is likely that other
PowerQUICC III devices will work as well.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>powerpc: Drop unused code related to generic board</title>
<updated>2016-05-27T19:39:54+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-05-15T00:49:34+00:00</published>
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<id>14c67ebaefec6d477603454aa2998c36da40453b</id>
<content type='text'>
Since generic board init is enabled, this is not used. Drop it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Since generic board init is enabled, this is not used. Drop it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2016-05-24T17:42:03+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-05-24T17:42:03+00:00</published>
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<pre>
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</entry>
<entry>
<title>arch/arm, arch/powerpc: add # of SEC engines on the SOC</title>
<updated>2016-05-18T15:51:46+00:00</updated>
<author>
<name>Alex Porosanu</name>
<email>alexandru.porosanu@freescale.com</email>
</author>
<published>2016-04-29T12:17:59+00:00</published>
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<id>404bf4547ecb4c1409ae0936444fe02ba978e510</id>
<content type='text'>
Some SOCs, specifically the ones in the C29x familiy can have
multiple security engines. This patch adds a system configuration
define which indicates the maximum number of SEC engines that
can be found on a SoC.

Signed-off-by: Alex Porosanu &lt;alexandru.porosanu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
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<pre>
Some SOCs, specifically the ones in the C29x familiy can have
multiple security engines. This patch adds a system configuration
define which indicates the maximum number of SEC engines that
can be found on a SoC.

Signed-off-by: Alex Porosanu &lt;alexandru.porosanu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: fsl_i2c: Enable DM for FSL I2C</title>
<updated>2016-05-17T06:28:55+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-04-25T06:31:09+00:00</published>
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<id>dbc82ce31b4e90ed171c10e02d382d36bf201dc4</id>
<content type='text'>
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
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<pre>
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
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</content>
</entry>
<entry>
<title>dm: fsl_i2c: Rename I2C register structure</title>
<updated>2016-05-17T06:28:52+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-04-25T06:31:01+00:00</published>
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<id>ec2c81c5d4681274f9f9d079b08ed259ff20dc69</id>
<content type='text'>
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
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<pre>
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
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</content>
</entry>
<entry>
<title>Kconfig: Move CONFIG_FIT and related options to Kconfig</title>
<updated>2016-03-14T23:18:07+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-02-23T05:55:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73223f0e1bd0e37925ae1b7f21b51733145571dc'/>
<id>73223f0e1bd0e37925ae1b7f21b51733145571dc</id>
<content type='text'>
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.

Move these options to Kconfig and tidy up board configuration:

   CONFIG_FIT
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_FIT_SIGNATURE
   CONFIG_FIT_BEST_MATCH
   CONFIG_FIT_VERBOSE
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_RSA

Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.

Note: Masahiro's moveconfig.py script is amazing.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.

Move these options to Kconfig and tidy up board configuration:

   CONFIG_FIT
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_FIT_SIGNATURE
   CONFIG_FIT_BEST_MATCH
   CONFIG_FIT_VERBOSE
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_RSA

Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.

Note: Masahiro's moveconfig.py script is amazing.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>freescale: Remove CONFIG_DM from header files</title>
<updated>2016-03-14T18:21:27+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-02-23T05:55:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e971632cd6dae4fc2b30c600ff5650ecf8944f1'/>
<id>9e971632cd6dae4fc2b30c600ff5650ecf8944f1</id>
<content type='text'>
Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
Remove the hacks which enable CONFIG_DM in header files and update the
defconfig.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
Remove the hacks which enable CONFIG_DM in header files and update the
defconfig.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/SECURE_BOOT: Add PAMU driver</title>
<updated>2016-02-24T16:40:55+00:00</updated>
<author>
<name>Aneesh Bansal</name>
<email>aneesh.bansal@nxp.com</email>
</author>
<published>2016-01-22T11:35:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f698e9f39aaf8ed30dab86f0130ea1e21bc721cc'/>
<id>f698e9f39aaf8ed30dab86f0130ea1e21bc721cc</id>
<content type='text'>
PAMU driver basic support for usage in Secure Boot.
In secure boot PAMU is not in bypass mode. Hence to use
any peripheral (SEC Job ring in our case), PAMU has to be
configured.

The patch reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3.

The Header file pamu.h and few functions in driver have been derived
from Freescale Libos.

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
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<pre>
PAMU driver basic support for usage in Secure Boot.
In secure boot PAMU is not in bypass mode. Hence to use
any peripheral (SEC Job ring in our case), PAMU has to be
configured.

The patch reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3.

The Header file pamu.h and few functions in driver have been derived
from Freescale Libos.

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Signed-off-by: Aneesh Bansal &lt;aneesh.bansal@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2016-01-27T20:05:36+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-01-27T20:05:36+00:00</published>
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