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<title>u-boot.git/arch/powerpc/include, branch v2017.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/include?h=v2017.05</id>
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<updated>2017-04-30T14:30:03Z</updated>
<entry>
<title>Convert CONFIG_CMD_BLOB to Kconfig</title>
<updated>2017-04-30T14:30:03Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-04-27T04:27:53Z</published>
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<id>urn:sha1:c04b9b3440a2b2c55267bc76c594f49d101657fb</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_CMD_BLOB

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>powerpc: T1042RDB: SECURE BOOT: Remove CONFIG_CMD_BLOB from SPL compilation</title>
<updated>2017-04-17T16:03:30Z</updated>
<author>
<name>VINITHA PILLAI</name>
<email>vinitha.pillai@nxp.com</email>
</author>
<published>2017-03-31T05:20:02Z</published>
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<id>urn:sha1:0645c23a7cb29b8fddd517be9b585b56a629e744</id>
<content type='text'>
BLOB feature is not required during SPL compilation.

Signed-off-by: Vinitha Pillai &lt;vinitha.pillai@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>board_f: powerpc: Make prt_8260_rsr(), prt_8260_clks() private</title>
<updated>2017-04-05T17:55:08Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-28T16:27:29Z</published>
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<id>urn:sha1:8749fa6af3e94630eeb02bc3a45fe9bdcb8d3087</id>
<content type='text'>
Move these two function calls into checkcpu(), which is called on this
arch immediately after these two.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>board_f: powerpc: Move prt_83xx_rsr() to private code</title>
<updated>2017-04-05T17:55:06Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-28T16:27:27Z</published>
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<id>urn:sha1:d891ab95c2086503f1bfca4c34af35cb64dfab1f</id>
<content type='text'>
This function is called just before checkcpu() on MPX83xx. Move it to the
code for that arch.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs</title>
<updated>2017-03-09T16:37:24Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-03-01T21:51:58Z</published>
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<id>urn:sha1:285226785ee178c0bbe8a67185c21e461cf4bc9f</id>
<content type='text'>
In some cases this is absolutely required, so select this for some secure
features.  This also requires migration of RSA_FREESCALE_EXP

Cc: Ruchika Gupta &lt;ruchika.gupta@nxp.com&gt;
Cc: Poonam Aggrwal &lt;poonam.aggrwal@freescale.com&gt;
Cc: Naveen Burmi &lt;NaveenBurmi@freescale.com&gt;
Cc: Po Liu &lt;po.liu@freescale.com&gt;
Cc: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Cc: Priyanka Jain &lt;Priyanka.Jain@freescale.com&gt;
Cc: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Cc: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Cc: Chunhe Lan &lt;Chunhe.Lan@freescale.com&gt;
Cc: Feng Li &lt;feng.li_2@nxp.com&gt;
Cc: Alison Wang &lt;alison.wang@freescale.com&gt;
Cc: Mingkai Hu &lt;Mingkai.Hu@freescale.com&gt;
Cc: York Sun &lt;york.sun@nxp.com&gt;
Cc: Saksham Jain &lt;saksham.jain@nxp.freescale.com&gt;
Cc: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-mpc85xx</title>
<updated>2017-01-25T22:38:45Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-01-25T22:09:01Z</published>
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<id>urn:sha1:79a34b71c943a80af5c6d9a2af736fbb37dcc14c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>powerpc: Drop CONFIG_SYS_ALLOC_DPRAM</title>
<updated>2017-01-25T22:38:42Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-01-23T20:31:23Z</published>
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<id>urn:sha1:8f3086aaac00749ce22be205ec01c97597a41b36</id>
<content type='text'>
This is not defined anywhere in U-Boot. Drop this dead code.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>mpc85xx: pcie: Implement workaround for Erratum A007815</title>
<updated>2017-01-24T21:28:31Z</updated>
<author>
<name>Tony O'Brien</name>
<email>tony.obrien@alliedtelesis.co.nz</email>
</author>
<published>2016-12-01T20:22:34Z</published>
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<id>urn:sha1:09bfd962bdc97359b916bfbf18a17e2a85396d65</id>
<content type='text'>
The read-only-write-enable bit is set by default and must be cleared
to prevent overwriting read-only registers.  This should be done
immediately after resetting the PCI Express controller.

Reviewed-by: Hamish Martin &lt;hamish.martin@alliedtelesis.co.nz&gt;
Signed-off-by: Tony O'Brien &lt;tony.obrien@alliedtelesis.co.nz&gt;
[York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig]
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907</title>
<updated>2017-01-24T21:28:02Z</updated>
<author>
<name>Darwin Dingel</name>
<email>darwin.dingel@alliedtelesis.co.nz</email>
</author>
<published>2016-10-24T20:48:01Z</published>
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<id>urn:sha1:06ad970b53a3d6aa122685e6142a04908434a8ef</id>
<content type='text'>
Core hang occurs when using L1 stashes. Workaround is to disable L1
stashes so software uses L2 cache for stashes instead.

Reviewed-by: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Signed-off-by: Darwin Dingel &lt;darwin.dingel@alliedtelesis.co.nz&gt;
Cc: York Sun &lt;york.sun@nxp.com&gt;
[York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig]
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUST</title>
<updated>2017-01-24T15:33:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-01-23T00:43:10Z</published>
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<id>urn:sha1:88077715d8d81825605028f2040b17137513f858</id>
<content type='text'>
Introduce board/freescale/common/Kconfig so that we have a single place
for CONFIG options that are shared between ARM and PowerPC NXP platforms.

Cc: York Sun &lt;york.sun@nxp.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
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