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<title>u-boot.git/arch/powerpc/include, branch v2023.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc/include?h=v2023.01</id>
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<updated>2022-11-10T15:08:55Z</updated>
<entry>
<title>global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace</title>
<updated>2022-11-10T15:08:55Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-29T00:27:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6cc04547cb3bbd3a3d78947f200acbae19e3c67f'/>
<id>urn:sha1:6cc04547cb3bbd3a3d78947f200acbae19e3c67f</id>
<content type='text'>
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace</title>
<updated>2022-11-10T15:08:55Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-29T00:27:12Z</published>
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<id>urn:sha1:5155207ae1a0797a99c0a5f4e99741960ff04697</id>
<content type='text'>
Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_INIT_RAM_LOCK to Kconfig</title>
<updated>2022-11-10T14:45:53Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-29T00:26:55Z</published>
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<id>urn:sha1:d3d0b5bb622d36851afffa4a60a8ec3c31db2572</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SYS_INIT_RAM_LOCK

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common/board_f: remove XTRN_DECLARE_GLOBAL_DATA_PTR dead code</title>
<updated>2022-10-07T01:05:17Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovpanait@gmail.com</email>
</author>
<published>2022-09-13T18:31:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=181cbd4017305142eb26df0aa065b8bb95921f83'/>
<id>urn:sha1:181cbd4017305142eb26df0aa065b8bb95921f83</id>
<content type='text'>
The XTRN_DECLARE_GLOBAL_DATA_PTR declarations in ppc code are permanently
commented out, so there are no users for this macro:
 #if 1
   #define DECLARE_GLOBAL_DATA_PTR   register volatile gd_t *gd asm ("r2")
 #else /* We could use plain global data, but the resulting code is bigger */
   #define XTRN_DECLARE_GLOBAL_DATA_PTR   extern
   #define DECLARE_GLOBAL_DATA_PTR     XTRN_DECLARE_GLOBAL_DATA_PTR \
                                       gd_t *gd
 #endif

Remove all references to this macro, but add a documentation note regarding
the possibility of using plain global data for the GD pointer.

Signed-off-by: Ovidiu Panait &lt;ovpanait@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>powerpc: remove support for kmtergr1 and MPC8309</title>
<updated>2022-08-21T02:45:00Z</updated>
<author>
<name>Holger Brunck</name>
<email>holger.brunck@hitachienergy.com</email>
</author>
<published>2022-08-19T14:55:06Z</published>
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<id>urn:sha1:845102cbe9fb752b7e02e74169f375c4ca54ed6a</id>
<content type='text'>
The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.

Signed-off-by: Holger Brunck &lt;holger.brunck@hitachienergy.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig</title>
<updated>2022-08-12T20:10:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-01T01:08:29Z</published>
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<id>urn:sha1:ff4e87c030bd62d643b0cbd86e7ff893caa97d1b</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_FSL_NGPIXIS
   CONFIG_SYS_FSL_QMAN_V3
   CONFIG_SYS_FSL_RAID_ENGINE
   CONFIG_SYS_FSL_RMU
   CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
   CONFIG_SYS_FSL_SRIO_LIODN
   CONFIG_SYS_FSL_TBCLK_DIV
   CONFIG_SYS_FSL_USB1_PHY_ENABLE
   CONFIG_SYS_FSL_USB2_PHY_ENABLE
   CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
   CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_FSL_PCIE_COMPAT to Kconfig</title>
<updated>2022-08-12T20:10:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-01T01:08:28Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4143a237947576b581eed1eaf88c207df80d418e'/>
<id>urn:sha1:4143a237947576b581eed1eaf88c207df80d418e</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SYS_FSL_PCIE_COMPAT

To do this, introduce a choice and option for each of the strings used
and set CONFIG_SYS_FSL_PCIE_COMPAT based on that.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_FSL_NUM_CC_PLLS to Kconfig</title>
<updated>2022-08-12T20:10:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-01T01:08:27Z</published>
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<id>urn:sha1:1de46d91dddfd60107c665530aed6ac25f55960e</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SYS_FSL_NUM_CC_PLLS

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig</title>
<updated>2022-08-12T20:10:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-01T01:08:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c6eec0182a9823e6238f34bd177f27330b0ad52d'/>
<id>urn:sha1:c6eec0182a9823e6238f34bd177f27330b0ad52d</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et al</title>
<updated>2022-08-12T20:10:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-01T01:08:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8b549c0b23619afbc9b8d26379710ecb937e20e2'/>
<id>urn:sha1:8b549c0b23619afbc9b8d26379710ecb937e20e2</id>
<content type='text'>
This removes the following symbols:
   CONFIG_SYS_FSL_DSPI_BE
   CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
   CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
   CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
   CONFIG_SYS_FSL_DSP_DDR_ADDR
   CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
   CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
   CONFIG_SYS_FSL_ERRATUM_A008751
   CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
   CONFIG_SYS_FSL_ESDHC_NUM
   CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
   CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
   CONFIG_SYS_FSL_ISBC_VER
   CONFIG_SYS_FSL_QSPI_LE
   CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
   CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
   CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
   CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
   CONFIG_SYS_FSL_SRDS_NUM_PLLS
   CONFIG_SYS_FSL_WDOG_BE
   CONFIG_SYS_GP1DIR
   CONFIG_SYS_GP1ODR
   CONFIG_SYS_GP2DIR
   CONFIG_SYS_GP2ODR
   CONFIG_SYS_HALT_BEFOR_RAM_JUMP
   CONFIG_SYS_HMI_BASE
   FSL_QSPI_FLASH_NUM
   FSL_QSPI_FLASH_SIZE

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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