u-boot.git/arch/powerpc/lib, branch v2013.01

env: Use getenv_yesno() more generally

2012-12-13T18:46:55Z

Move the getenv_yesno() to env_common.c and change most checks for 'y' or 'n' to use this helper. Signed-off-by: Joe Hershberger

mpc5200: Add SPL support

2012-12-05T16:30:51Z

This patch adds SPL booting support (NOR flash) for the MPC5200 platforms. Signed-off-by: Stefan Roese

SPL: Port SPL framework to powerpc

2012-12-05T16:30:22Z

This patch enables the SPL framework to be used on powerpc platforms and not only ARM. timer_init() does not exist on PPC systems. The timer (decrementer) is initialized and enabled in interrupt_init() here. And currently interrupt_init() is called after relocation to SDRAM. Since the only powerpc SPL implementation (a3m071) doesn't need a timer, let's remove this timer_init() call for PPC systems. Signed-off-by: Stefan Roese

powerpc: Extract EPAPR_MAGIC constants into processor.h

2012-12-05T16:27:02Z

By extracting these defines into a header, they can be re-used by other C sources as well. This will be done by the SPL framework OS boot support. Signed-off-by: Stefan Roese

spl/powerpc: introduce CONFIG_SPL_INIT_MINIMAL

2012-11-26T21:41:24Z

cpu_init_nand.c is renamed to spl_minimal.c as it is not really NAND-specific. Signed-off-by: Scott Wood --- v2: factor out START, and change cpu_init_nand.c to spl_minimal.c Cc: Andy Fleming

powerpc: change .fixup test to a GCC version test

2012-11-26T21:41:22Z

This was introduced by commit 244615197469dd6fe75ae082f38424b97c79aeaf, but it fails in a minimal SPL build where the only thing in arch/powerpc/lib is cache.c, which apparently doesn't generate any fixup records. The problem is reported to occur with GCC 3.x, so insist on GCC 4.0 or newer. Patterned after checkthumb as suggested by Tom Rini. Signed-off-by: Scott Wood Cc: Peter Tyser Cc: Tom Rini -- v2: test gcc version instead of testing nothing

arch/powerpc/lib/board.c, *traps.c: sparse fixes

2012-11-04T18:00:35Z

traps.c:*:1: warning: symbol 'print_backtrace' was not declared. Should it be static? traps.c:93:1: warning: symbol '_exception' was not declared. Should it be static? board.c:166:6: warning: symbol '__board_add_ram_info' was not declared. Should it be static? board.c:174:5: warning: symbol '__board_flash_wp_on' was not declared. Should it be static? board.c:187:6: warning: symbol '__cpu_secondary_init_r' was not declared. Should it be static? board.c:265:12: warning: symbol 'init_sequence' was not declared. Should it be static? board.c:348:5: warning: symbol '__fixup_cpu' was not declared. Should it be static? board.c:405:53: warning: Using plain integer as NULL pointer Signed-off-by: Kim Phillips

arch/powerpc/lib/extable.c: sparse fix

2012-11-04T18:00:35Z

extable.c:66:9: warning: symbol 'ex_tab_message' was not declared. Should it be static? making it static can produce a new build warning on some boards: extable.c:66:12: warning: 'ex_tab_message' defined but not used [-Wunused-variable] but ex_tab_message doesn't do much even when used, so just remove it. Signed-off-by: Kim Phillips

include/linux/byteorder: import latest endian definitions from linux

2012-11-04T18:00:34Z

u-boot's byteorder headers did not contain endianness attributions for use with sparse, causing a lot of false positives. Import the kernel's latest definitions, and enable them by including compiler.h and types.h. They come with 'const' added for some swab functions, so fix those up, too: include/linux/byteorder/big_endian.h:46:2: warning: passing argument 1 of '__swab64p' discards 'const' qualifier from pointer target type [enabled by default] Also, note: u-boot's historic __BYTE_ORDER definition has been preserved (for the time being at least). We also remove ad-hoc barrier() definitions, since we're including compiler.h in files that hadn't in the past: macb.c:54:0: warning: "barrier" redefined [enabled by default] In addition, including compiler.h in byteorder changes the 'noinline' definition to expand to __attribute__((noinline)). This fixes arch/powerpc/lib/bootm.c: bootm.c:329:16: error: attribute '__attribute__': unknown attribute bootm.c:329:16: error: expected ')' before '__attribute__' bootm.c:329:25: error: expected identifier or '(' before ')' token powerpc sparse builds yield: include/common.h:356:22: error: marked inline, but without a definition the unknown-reason inlining without a definition is considered obsolete given it was part of the 2002 initial commit, and no arm version was 'fixed.' also fixed: ydirectenv.h:60:0: warning: "inline" redefined [enabled by default] and: Configuring for devconcenter - Board: intip, Options: DEVCONCENTER make[1]: *** [4xx_ibm_ddr2_autocalib.o] Error 1 make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2 powerpc-fsl-linux-size: './u-boot': No such file 4xx_ibm_ddr2_autocalib.c: In function 'DQS_autocalibration': include/asm/ppc4xx-sdram.h:1407:13: sorry, unimplemented: inlining failed in call to 'ppc4xx_ibm_ddr2_register_dump': function body not available 4xx_ibm_ddr2_autocalib.c:1243:32: sorry, unimplemented: called from here and: In file included from crc32.c:50:0: crc32table.h:4:1: warning: implicit declaration of function '___constant_swab32' [-Wimplicit-function-declaration] crc32table.h:4:1: error: initializer element is not constant crc32table.h:4:1: error: (near initialization for 'crc32table_le[0]') Signed-off-by: Kim Phillips [trini: Remove '#endif' in include/common.h around setenv portion] Signed-off-by: Tom Rini

powerpc/mpc85xx: software workaround for DDR erratum A-004468

2012-10-22T19:31:28Z

Boot space translation utilizes the pre-translation address to select the DDR controller target. However, the post-translation address will be presented to the selected DDR controller. It is possible that the pre- translation address selects one DDR controller but the post-translation address exists in a different DDR controller when using certain DDR controller interleaving modes. The device may fail to boot under these circumstances. Note that a DDR MSE error will not be detected since DDR controller bounds registers are programmed to be the same when configured for DDR controller interleaving. Signed-off-by: York Sun Signed-off-by: Andy Fleming