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<title>u-boot.git/arch/powerpc/lib, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2024-12-30T21:55:11Z</updated>
<entry>
<title>Merge patch series "powerpc: Fix and enforce distinction between immediates and registers"</title>
<updated>2024-12-30T21:55:11Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-12-30T21:55:11Z</published>
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<id>urn:sha1:c379590ab7eaabc00c21eb49796d99627d33ac97</id>
<content type='text'>
J. Neuschäfer &lt;j.ne@posteo.net&gt; says:

This patchset changes the definition r0 etc. to %r0, so that the
assembler can check that registers are only used where expected, and
fixes the fallout.

Link: https://lore.kernel.org/r/20241212-gpr-checks-v1-0-8c084c5fc0b6@posteo.net
</content>
</entry>
<entry>
<title>powerpc: Fix 0 vs. r0 confusion in X/D-form instructions</title>
<updated>2024-12-30T21:55:07Z</updated>
<author>
<name>J. Neuschäfer</name>
<email>j.ne@posteo.net</email>
</author>
<published>2024-12-12T17:05:46Z</published>
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<id>urn:sha1:fd1c2938c0ef23db322b974a5d2b8020aa6a8750</id>
<content type='text'>
Instructions such as dcbi are in the X-form; they have RA and RB fields
and the effective address (EA) is computed as (RA|0)+(RB). In words,
this means that if RA is zero, the left-hand side of the addition is
zero, otherwise the corresponding GPR is used. r0 can never be used on
the left-hand side of a X-form instruction.

For D-form instructions such as addis, the Power ISA illustrates this in
the instruction pseudo-code:

	if RA = 0 then RT &lt;-        EXTS(SI || 0x0000)
	else           RT &lt;- (RA) + EXIS(SI || 0x0000)

In all of these cases, RA=0 indicates the value zero, not register r0.

I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig
(MPC85xx) that this patch results in the same machine code.

Signed-off-by: J. Neuschäfer &lt;j.ne@posteo.net&gt;
</content>
</entry>
<entry>
<title>lmb: Remove lmb_reserve_flags()</title>
<updated>2024-12-30T19:21:55Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2024-12-18T07:02:32Z</published>
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<id>urn:sha1:900a8951c3b6035c25632438ebc7240cbc77883c</id>
<content type='text'>
lmb_reserve() is just calling lmb_reserve_flags() with LMB_NONE.
There's not much we gain from this abstraction.
So let's remove the latter, add the flags argument to lmb_reserve()
and make the code a bit easier to follow.

Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Tested-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>global: Rename SPL_TPL_ to PHASE_</title>
<updated>2024-10-11T17:44:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:54Z</published>
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<id>urn:sha1:5c10c8badf8233cac1593cd2bef4d0379ac9e5bd</id>
<content type='text'>
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:46Z</published>
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<id>urn:sha1:bef9fdbed2e525ce9264d2ae2fbcb37db7472052</id>
<content type='text'>
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>lmb: do away with arch_lmb_reserve()</title>
<updated>2024-09-03T20:08:50Z</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@linaro.org</email>
</author>
<published>2024-08-26T11:59:30Z</published>
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<id>urn:sha1:6534d26ee9a5217faaba8e49cbd95ce5ef107ee8</id>
<content type='text'>
All of the current definitions of arch_lmb_reserve() are doing the
same thing -- reserve the region of memory occupied by U-Boot,
starting from the current stack address to the ram_top. Introduce a
function lmb_reserve_uboot_region() which does this, and do away with
the arch_lmb_reserve() function.

Instead of using the current value of stack pointer for starting the
reserved region, have a fixed value, considering the stack size config
value.

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@linaro.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>ppc: lmb: move arch specific lmb reservations to arch_misc_init()</title>
<updated>2024-09-03T20:08:50Z</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@linaro.org</email>
</author>
<published>2024-08-26T11:59:29Z</published>
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<id>urn:sha1:17f695dd1bead58139b6649e516e0770b3d8a25e</id>
<content type='text'>
All the current function definitions of arch_lmb_reserve() are doing
the same thing -- reserve the U-Boot memory region. The powerpc(ppc)
architecture, in addition, is making some LMB reservations for the
bootm related image loading. Move these ppc specific reservations to
the arch_misc_init() function. This allows to move the U-Boot memory
region reservation to a different function, and remove
arch_lmb_reserve() in a subsequent commit.

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@linaro.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>lmb: make LMB memory map persistent and global</title>
<updated>2024-09-03T20:08:50Z</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@linaro.org</email>
</author>
<published>2024-08-26T11:59:18Z</published>
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<id>urn:sha1:ed17a33fed296a87219b0ff702045ce488bc3771</id>
<content type='text'>
The current LMB API's for allocating and reserving memory use a
per-caller based memory view. Memory allocated by a caller can then be
overwritten by another caller. Make these allocations and reservations
persistent using the alloced list data structure.

Two alloced lists are declared -- one for the available(free) memory,
and one for the used memory. Once full, the list can then be extended
at runtime.

[sjg: Use a stack to store pointer of lmb struct when running lmb tests]

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@linaro.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[sjg: Optimise the logic to add a region in lmb_add_region_flags()]
</content>
</entry>
<entry>
<title>ppc: Remove duplicate newlines</title>
<updated>2024-07-15T18:12:18Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2024-07-13T13:19:29Z</published>
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<id>urn:sha1:5f9a3003be1d9657cf450e3dedf56e92a7415e07</id>
<content type='text'>
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Add the old invalidate_icache_all function</title>
<updated>2024-07-03T20:42:01Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-06-19T21:27:58Z</published>
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<id>urn:sha1:280e54656f3e1a356baca02dc264d9d9407bf0a9</id>
<content type='text'>
Add the old invalidate_icache_all function that prints a warning that
was previously found in cmd/cache.c

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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