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<title>u-boot.git/arch/powerpc, branch v2011.12</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>powerpc/mpc83xx: set TXEQA/TXEQE value for mpc837XE sata</title>
<updated>2011-12-13T00:33:39+00:00</updated>
<author>
<name>Jerry Huang</name>
<email>Chang-Ming.Huang@freescale.com</email>
</author>
<published>2011-11-17T02:15:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=509adc8b77f885e946449ed62191fbef7fe67b56'/>
<id>509adc8b77f885e946449ed62191fbef7fe67b56</id>
<content type='text'>
In the current u-boot code, the value of these fields are the reserved
value (0b100), through the signal integrity measurement on freescale's
board with these reserved setting, the signal eye is out of the recommended
spec for non-transition amplitude at 500mV nominal.
According to the errata for MPC8379E, we should make a change to the
recommended setting from essentially nothing at this time to 0b001 for SATA.

Signed-off-by: Jerry Huang &lt;Chang-Ming.Huang@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
In the current u-boot code, the value of these fields are the reserved
value (0b100), through the signal integrity measurement on freescale's
board with these reserved setting, the signal eye is out of the recommended
spec for non-transition amplitude at 500mV nominal.
According to the errata for MPC8379E, we should make a change to the
recommended setting from essentially nothing at this time to 0b001 for SATA.

Signed-off-by: Jerry Huang &lt;Chang-Ming.Huang@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>powerpc/bootm: Flush ramdisk and device tree image when booting on MP</title>
<updated>2011-12-12T07:17:52+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2011-12-07T04:42:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3b2001105fe4d0326f7aa1f83534accfdaec6a01'/>
<id>3b2001105fe4d0326f7aa1f83534accfdaec6a01</id>
<content type='text'>
We already flush the kernel image after we've loaded it to ensure
visiblity to the other cores.  We need to do the same thing for the
ramdisk and device tree images.  In AMP boot scenarios we might not be
HW cache coherent with the secondary core that we are loading and
setting the ramdisk and device tree up for.  Thus we need to ensure
we've flushed the regions of memory utilized by ramdisk and device tree
so the loadding and any modifications (from decompression or fdt updates)
are made visible to the secondary cores.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
We already flush the kernel image after we've loaded it to ensure
visiblity to the other cores.  We need to do the same thing for the
ramdisk and device tree images.  In AMP boot scenarios we might not be
HW cache coherent with the secondary core that we are loading and
setting the ramdisk and device tree up for.  Thus we need to ensure
we've flushed the regions of memory utilized by ramdisk and device tree
so the loadding and any modifications (from decompression or fdt updates)
are made visible to the secondary cores.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Minimal private libgcc to build on Debian</title>
<updated>2011-12-07T22:04:32+00:00</updated>
<author>
<name>Kyle Moffett</name>
<email>Kyle.D.Moffett@boeing.com</email>
</author>
<published>2011-02-23T06:40:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=01baa05643001638b6d7d6a26123ce04f6c7154c'/>
<id>01baa05643001638b6d7d6a26123ce04f6c7154c</id>
<content type='text'>
Standard Debian powerpc and powerpcspe systems only include hard-float
libgcc in their native compilers, which causes scary build warnings when
building U-Boot.

Debian and other PowerPC-supporting distributions used to provide libgcc
and other libraries in a "nof" (soft-float) form in the "multilib"
packages.  As they were completely unused by the distribution and
therefore tended to be very buggy it was decided to save some time on
the part of the maintainers and build-servers by removing them.

Admittedly, right now the linker warnings do not indicate any problems,
as the included routines do not use any floating point at all.

The concern is that if floating-point code were ever added it might
cause hard-float code to be unexpectedly included in U-Boot without
generating a hard error.  This would cause unexplained crashes or
indeterminate results at runtime.

The easiest way to resolve this is to borrow the routines that U-Boot
needs from the Linux kernel, which has the same issue.

Specifically, the routines are: _ashldi3(), _ashrdi3(), and _lshrdi3().
They were borrowed from arch/powerpc/kernel/misc_32.S as of v2.6.38-rc5,
commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, and are GPLv2+.

The Makefile framework was copied from the U-Boot ARM port.

Signed-off-by: Kyle Moffett &lt;Kyle.D.Moffett@boeing.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Cc: Andy Fleming &lt;afleming@gmail.com&gt;
Cc: Kumar Gala &lt;kumar.gala@freescale.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
Standard Debian powerpc and powerpcspe systems only include hard-float
libgcc in their native compilers, which causes scary build warnings when
building U-Boot.

Debian and other PowerPC-supporting distributions used to provide libgcc
and other libraries in a "nof" (soft-float) form in the "multilib"
packages.  As they were completely unused by the distribution and
therefore tended to be very buggy it was decided to save some time on
the part of the maintainers and build-servers by removing them.

Admittedly, right now the linker warnings do not indicate any problems,
as the included routines do not use any floating point at all.

The concern is that if floating-point code were ever added it might
cause hard-float code to be unexpectedly included in U-Boot without
generating a hard error.  This would cause unexplained crashes or
indeterminate results at runtime.

The easiest way to resolve this is to borrow the routines that U-Boot
needs from the Linux kernel, which has the same issue.

Specifically, the routines are: _ashldi3(), _ashrdi3(), and _lshrdi3().
They were borrowed from arch/powerpc/kernel/misc_32.S as of v2.6.38-rc5,
commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, and are GPLv2+.

The Makefile framework was copied from the U-Boot ARM port.

Signed-off-by: Kyle Moffett &lt;Kyle.D.Moffett@boeing.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Cc: Andy Fleming &lt;afleming@gmail.com&gt;
Cc: Kumar Gala &lt;kumar.gala@freescale.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx</title>
<updated>2011-12-07T22:01:26+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2011-12-07T22:01:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1086c5d6f8541460f0f10e4a302d8aac27e0e6e0'/>
<id>1086c5d6f8541460f0f10e4a302d8aac27e0e6e0</id>
<content type='text'>
* 'master' of git://git.denx.de/u-boot-mpc83xx:
  powerpc/83xx: fix sdram initialization for keymile boards
  powerpc/mpc83xx: cleanup makefile for mpc83xx
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<pre>
* 'master' of git://git.denx.de/u-boot-mpc83xx:
  powerpc/83xx: fix sdram initialization for keymile boards
  powerpc/mpc83xx: cleanup makefile for mpc83xx
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Remove usbdev.c</title>
<updated>2011-12-07T19:00:40+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2011-11-18T02:38:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ce2acd371c4eee36e55d706a181361c25ebfe160'/>
<id>ce2acd371c4eee36e55d706a181361c25ebfe160</id>
<content type='text'>
As this "driver" doesn't seem to be really used, let's remove
it completely.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
As this "driver" doesn't seem to be really used, let's remove
it completely.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/powerpc/cpu/mpc86xx/cpu.c: Fix GCC 4.6 build warning</title>
<updated>2011-12-01T23:16:46+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2011-11-29T22:17:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ad37ef1a85114467cb8749e0ee785c1f9966109b'/>
<id>ad37ef1a85114467cb8749e0ee785c1f9966109b</id>
<content type='text'>
Fix:
cpu.c: In function 'checkcpu':
cpu.c:51:7: warning: variable 'ver' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Fix:
cpu.c: In function 'checkcpu':
cpu.c:51:7: warning: variable 'ver' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc85xx: support for Freescale COM Express P2020</title>
<updated>2011-11-29T15:07:51+00:00</updated>
<author>
<name>Ira W. Snyder</name>
<email>iws@ovro.caltech.edu</email>
</author>
<published>2011-11-23T16:25:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9839709ea3df89f6021034508f48b97cab33ebb8'/>
<id>9839709ea3df89f6021034508f48b97cab33ebb8</id>
<content type='text'>
This adds support for the Freescale COM Express P2020 board. This board
is similar to the P1_P2_RDB, but has some extra (as well as missing)
peripherals.

Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
Using the HRESET_REQ register does not work.

This board has no NOR flash, and can only be booted via SD or SPI. This
procedure is documented in Freescale Document Number AN3659 "Booting
from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
Processor Reference Manual" (section 4.5).

Signed-off-by: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
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<pre>
This adds support for the Freescale COM Express P2020 board. This board
is similar to the P1_P2_RDB, but has some extra (as well as missing)
peripherals.

Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
Using the HRESET_REQ register does not work.

This board has no NOR flash, and can only be booted via SD or SPI. This
procedure is documented in Freescale Document Number AN3659 "Booting
from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
Processor Reference Manual" (section 4.5).

Signed-off-by: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning</title>
<updated>2011-11-29T14:48:06+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2011-11-23T16:02:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=411e150375de1ab15029bc82fa9af8a4bfb51383'/>
<id>411e150375de1ab15029bc82fa9af8a4bfb51383</id>
<content type='text'>
Fix:

interactive.c: In function 'fsl_ddr_interactive':
interactive.c:1357:15: warning: variable 'len' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Fix:

interactive.c: In function 'fsl_ddr_interactive':
interactive.c:1357:15: warning: variable 'len' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc85xx: support board-specific reset function</title>
<updated>2011-11-29T14:48:06+00:00</updated>
<author>
<name>Ira W. Snyder</name>
<email>iws@ovro.caltech.edu</email>
</author>
<published>2011-11-21T21:20:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c18de0d7ae230393bed520cd8656660e1f29c252'/>
<id>c18de0d7ae230393bed520cd8656660e1f29c252</id>
<content type='text'>
This is useful for boards which cannot be reset in the usual way for the
85xx CPU. An example is a board which can only be reset by a hardware
watchdog.

Signed-off-by: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
This is useful for boards which cannot be reset in the usual way for the
85xx CPU. An example is a board which can only be reset by a hardware
watchdog.

Signed-off-by: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/85xx: verify the localbus device tree address before booting the OS</title>
<updated>2011-11-29T14:48:06+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2011-11-16T19:28:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cc15df57b1ce2fb7b9aac7567b25e7b3bef28458'/>
<id>cc15df57b1ce2fb7b9aac7567b25e7b3bef28458</id>
<content type='text'>
The localbus controller node in the device tree is typically a root node,
even though the controller is part of CCSR.  If we were to put the lbc
node under the SOC node, then the 'ranges' property in the lbc node would
translate through the 'ranges' property of the parent SOC node, and we
don't want that.

Since the lbc is a separate node, it's possible for the 'reg' property to
be wrong.  This happened with the original version of p1022ds.dts, which
used a 32-bit value in the 'reg' address, instead of a 36-bit address.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
The localbus controller node in the device tree is typically a root node,
even though the controller is part of CCSR.  If we were to put the lbc
node under the SOC node, then the 'ranges' property in the lbc node would
translate through the 'ranges' property of the parent SOC node, and we
don't want that.

Since the lbc is a separate node, it's possible for the 'reg' property to
be wrong.  This happened with the original version of p1022ds.dts, which
used a 32-bit value in the 'reg' address, instead of a 36-bit address.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
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