u-boot.git/arch/powerpc, branch v2013.01

env: Use getenv_yesno() more generally

2012-12-13T18:46:55Z

Move the getenv_yesno() to env_common.c and change most checks for 'y' or 'n' to use this helper. Signed-off-by: Joe Hershberger

Add strcasecmp() and strncasecmp()

2012-12-11T20:17:34Z

strncasecmp() is present as strnicmp() but disabled. Make it available and define strcasecmp() also. There is a only a small performance penalty to having strcasecmp() call strncasecmp(), so do this instead of a standalone function, to save code space. Update the prototype in arch-specific headers as needed to avoid warnings. Signed-off-by: Simon Glass

mpc5200: Add SPL support

2012-12-05T16:30:51Z

This patch adds SPL booting support (NOR flash) for the MPC5200 platforms. Signed-off-by: Stefan Roese

SPL: Port SPL framework to powerpc

2012-12-05T16:30:22Z

This patch enables the SPL framework to be used on powerpc platforms and not only ARM. timer_init() does not exist on PPC systems. The timer (decrementer) is initialized and enabled in interrupt_init() here. And currently interrupt_init() is called after relocation to SDRAM. Since the only powerpc SPL implementation (a3m071) doesn't need a timer, let's remove this timer_init() call for PPC systems. Signed-off-by: Stefan Roese

powerpc: Extract EPAPR_MAGIC constants into processor.h

2012-12-05T16:27:02Z

By extracting these defines into a header, they can be re-used by other C sources as well. This will be done by the SPL framework OS boot support. Signed-off-by: Stefan Roese

powerpc/mpc85xx: Fix a bug introduced by CONFIG_PPC_SPINTABLE_COMPATIBLE

2012-11-28T00:28:08Z

Fix a bug introduced by this patch powerpc/mpc85xx: Temporary fix for spin table backward compatibility Should have checked both CONFIG_PPC_SPINTABLE_COMPATIBLE and CONFIG_MP in cpu_init.c. Signed-off-by: York Sun Signed-off-by: Andy Fleming

powerpc/85xx: update the work-around for P4080 erratum SERDES-9

2012-11-28T00:28:07Z

The documented work-around for P4080 erratum SERDES-9 has been updated. It is now compatible with the work-around for erratum A-4580. This requires adding a few bitfield macros for the BnTTLCRy0 register. Signed-off-by: Timur Tabi Signed-off-by: Andy Fleming

powerpc/p4080ds: fix PCI-e x8 link training down failure

2012-11-28T00:28:07Z

Due to SerDes configuration error, if we set the PCI-e controller link width as x8 in RCW and add a narrower width(such as x4, x2 or x1) PCI-e device to PCI-e slot, it fails to train down to the PCI-e device's link width. According to p4080ds errata PCIe-A003, we reset the PCI-e controller link width to x4 in u-boot. Then it can train down to x2 or x1 width to make the PCI-e link between RC and EP. Signed-off-by: Yuanquan Chen Signed-off-by: Andy Fleming

powerpc/corenet_ds: move SATA config to board configuration

2012-11-28T00:28:07Z

board configuration file is included before asm/config_mpc85xx.h. however, CONFIG_FSL_SATA_V2 is defined in asm/config_mpc85xx.h. it will never take effective in the board configuration file for this kind of code : #ifdef CONFIG_FSL_SATA_V2 ... #endif To solve this problem, move CONFIG_FSL_SATA_V2 to board configuration header file. This patch reverts Timur's commit:3e0529f742e893653848494ffb9f7cd0d91304bf Signed-off-by: Roy Zang Signed-off-by: Andy Fleming

powerpc/85xx: implement check for erratum A-004580 work-around

2012-11-28T00:28:07Z

The work-around for erratum A-004580 ("Internal tracking loop can falsely lock causing unrecoverable bit errors") is implemented via the PBI (pre-boot initialization code, typically attached to the RCW binary). This is because the work-around is easier to implement in PBI than in U-Boot itself. It is still useful, however, for the 'errata' command to tell us whether the work-around has been applied. For A-004580, we can do this by verifying that the values in the specific registers that the work-around says to update. This change requires access to the SerDes lane sub-structure in serdes_corenet_t, so we make it a named struct. Signed-off-by: Timur Tabi Signed-off-by: Andy Fleming